{
  "schema": "aisic.circuit/1",
  "entryType": "library-block",
  "domain": "analog",
  "id": "ldo-5t-hv",
  "name": "Core-supply LDO from 3.3 V",
  "group": "Voltage regulators",
  "subgroup": "LDOs",
  "title": "Core-supply LDO from 3.3 V",
  "summary": "Regulates a 3.3 V input down to the 1.2 V core supply. A five-transistor amplifier compares the output with a reference and drives a PMOS pass gate. Compensation stabilizes the loop; enough gate-drive current is needed to limit overshoot when the load is released.",
  "reference": {
    "kind": "paper",
    "authors": "Z. Li, A. Chan Carusone",
    "title": "Design and Optimization of Low-Dropout Voltage Regulator Using Relational Graph Neural Network and Reinforcement Learning in Open-Source SKY130 Process",
    "year": 2023,
    "where": "2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), pp. 1-9",
    "doi": "10.1109/ICCAD57390.2023.10323720",
    "takes": "The topology: a five-transistor error amplifier with the output fed straight back, a PMOS pass device, a Miller capacitor with a series resistor from its gate to the output, and a bleed. Here it makes the SG13G2 core supply from the 3.3 V I/O supply, so it is built on the 3.3 V devices; the sizing and specs are this library's."
  },
  "resources": {
    "record": "/circuits/ldo-5t-hv.json",
    "page": "/index.html#ldo-5t-hv",
    "achieved": "/achieved/ldo-5t-hv.json",
    "achievedScope": "Recorded results apply to the published default design and their recorded conditions, not arbitrary sizing edits in a downloaded record.",
    "modelCards": [
      {
        "name": "sg13g2_hv_tt.spice",
        "url": "/sg13g2_hv_tt.spice",
        "sha256": "e9b858ad4f7bba550467f1eddb6ca496bcc5f4644474f41240d63927934928ad"
      },
      {
        "name": "sg13g2_passive_tt.spice",
        "url": "/sg13g2_passive_tt.spice",
        "sha256": "c00886f0de9e2a3bbd746e3771812e7ffea84cd452f2dbda6cc0fb7699a539cc"
      }
    ],
    "urlBase": "Resource URLs start at this site's root. Save model cards beside exported SPICE decks using their include filenames.",
    "schema": "/schemas/circuit.schema.json"
  },
  "specificationPolicy": {
    "evidence": "Simulation evidence is not a production guarantee or completed physical signoff.",
    "defaultScope": "Numeric limits apply at every requested condition unless an explicit supported scope says otherwise.",
    "scopes": {
      "nominal": {
        "corner": "tt",
        "temp": 27,
        "vdd": 1,
        "temperatureUnit": "degC",
        "supplyMeaning": "scale of the bench's nominal supply"
      }
    },
    "characterization": "Out-of-scope results retain their numerical values and execution coverage, without a parametric-yield claim."
  },
  "corners": {
    "cards": "a deck's sg13g2_<family>_tt.spice (family lv, hv, passive, hbt) becomes sg13g2_<family>_<corner>.spice",
    "process": [
      "tt",
      "ss",
      "ff",
      "sf",
      "fs"
    ],
    "pairing": "resistors, capacitors and bipolars go to their worst-case-speed corner (wcs) with ss, their best case (bcs) with ff, and stay typical otherwise",
    "temperatures": [
      -40,
      27,
      125
    ],
    "supplyScale": [
      0.9,
      1,
      1.1
    ],
    "supply": "a deck's .param VDD, or its Vdd source, times supplyScale; a testbench that drives its supply itself keeps it",
    "held": "what a testbench gives from outside - bias currents, references - stays at its typical value at every corner and in every draw",
    "sets": {
      "essential": [
        {
          "corner": "tt",
          "temp": 27,
          "vdd": 1
        },
        {
          "corner": "ss",
          "temp": 27,
          "vdd": 1
        },
        {
          "corner": "ff",
          "temp": 27,
          "vdd": 1
        },
        {
          "corner": "sf",
          "temp": 27,
          "vdd": 1
        },
        {
          "corner": "fs",
          "temp": 27,
          "vdd": 1
        },
        {
          "corner": "tt",
          "temp": -40,
          "vdd": 1
        },
        {
          "corner": "tt",
          "temp": 125,
          "vdd": 1
        },
        {
          "corner": "tt",
          "temp": 27,
          "vdd": 0.9
        },
        {
          "corner": "tt",
          "temp": 27,
          "vdd": 1.1
        },
        {
          "corner": "ss",
          "temp": 125,
          "vdd": 0.9
        },
        {
          "corner": "ff",
          "temp": -40,
          "vdd": 1.1
        }
      ],
      "full": "all 45 combinations"
    },
    "montecarlo": {
      "cards": {
        "mc": "process and mismatch",
        "mcmm": "mismatch only",
        "mcproc": "process only"
      },
      "seed": "draw k adds .options seed=k, so draws are reproducible"
    }
  },
  "technology": {
    "id": "sg13g2",
    "name": "IHP SG13G2",
    "node": "130 nm",
    "corner": "tt",
    "vdd": 1.2,
    "lmin": 1.3e-7,
    "wmin": 1.5e-7,
    "models": "sg13g2_lv_tt.spice",
    "devices": {
      "nmos": "sg13_lv_nmos",
      "pmos": "sg13_lv_pmos",
      "resistor": "rppd, rhigh",
      "capacitor": "cap_cmim"
    },
    "defaultsScope": "vdd, lmin, wmin, models and devices above describe the core-PDK defaults, not every circuit's supply or device requirements. Use the sizing, device list, cards and testbench netlists for this implementation, including HV and bipolar devices where present.",
    "note": "Sizes are in metres (w=1u); ng is the number of gate fingers. The MOSFETs are PSP 103 and the resistors r3_cmc, Verilog-A models ngspice loads through OSDI - psp103.osdi and r3_cmc.osdi, compiled with OpenVAF."
  },
  "implementation": {
    "kind": "physical-device-reference",
    "purpose": "A reasonable SG13G2 realization for learning, reuse and technology retargeting; not a claim of globally optimal sizing.",
    "evidence": "schematic-simulation",
    "netlistBoundary": "Exported netlists are complete simulation benches, including ideal stimuli, loads, bias/reference sources and, where stated, parasitic surrogates or numerical aids; they are not fabrication netlists. Integrate and verify the physical support circuits separately.",
    "physicalSignoff": "Layout, DRC, LVS, extracted-parasitic simulation and silicon measurements are not supplied by this catalogue.",
    "retargeting": "Preserve topology, intent and interfaces; select legal devices and resize for the destination process, then repeat operating-range, PVT, mismatch and physical verification."
  },
  "cards": [
    "sg13g2_hv_tt.spice",
    "sg13g2_passive_tt.spice"
  ],
  "ports": [
    {
      "name": "ref",
      "kind": "input",
      "note": "the reference voltage, which the output copies"
    },
    {
      "name": "sense",
      "kind": "input",
      "note": "the output as the regulator reads it"
    },
    {
      "name": "out",
      "kind": "output"
    },
    {
      "name": "vdd",
      "kind": "supply",
      "note": "the unregulated 3.3 V input"
    },
    {
      "name": "vss",
      "kind": "ground"
    },
    {
      "name": "ib",
      "kind": "bias",
      "note": "the bias current, driven into this pin"
    }
  ],
  "devices": [
    {
      "name": "MB",
      "type": "nmos",
      "model": "sg13_hv_nmos",
      "nodes": "ib ib vss vss",
      "sizedBy": [
        "Wn",
        "Ln"
      ],
      "role": "bias reference, diode-connected",
      "fingers": 2,
      "copies": 1
    },
    {
      "name": "MT",
      "type": "nmos",
      "model": "sg13_hv_nmos",
      "nodes": "tail ib vss vss",
      "sizedBy": [
        "Wn",
        "Ln",
        "N"
      ],
      "role": "error amplifier tail, N copies of MB",
      "fingers": 2,
      "copies": 24
    },
    {
      "name": "M1",
      "type": "nmos",
      "model": "sg13_hv_nmos",
      "nodes": "d1 sense tail vss",
      "sizedBy": [
        "W1",
        "L1"
      ],
      "role": "input pair, the output",
      "fingers": 8,
      "copies": 1
    },
    {
      "name": "M2",
      "type": "nmos",
      "model": "sg13_hv_nmos",
      "nodes": "gate ref tail vss",
      "sizedBy": [
        "W1",
        "L1"
      ],
      "role": "input pair, the reference",
      "fingers": 8,
      "copies": 1
    },
    {
      "name": "M3",
      "type": "pmos",
      "model": "sg13_hv_pmos",
      "nodes": "d1 d1 vdd vdd",
      "sizedBy": [
        "Wp",
        "Lp"
      ],
      "role": "mirror load, diode-connected",
      "fingers": 8,
      "copies": 1
    },
    {
      "name": "M4",
      "type": "pmos",
      "model": "sg13_hv_pmos",
      "nodes": "gate d1 vdd vdd",
      "sizedBy": [
        "Wp",
        "Lp"
      ],
      "role": "mirror load, drives the pass gate",
      "fingers": 8,
      "copies": 1
    },
    {
      "name": "MP",
      "type": "pmos",
      "model": "sg13_hv_pmos",
      "nodes": "out gate vdd vdd",
      "sizedBy": [
        "Wpass",
        "Lpass"
      ],
      "role": "pass device",
      "fingers": 480,
      "copies": 1
    },
    {
      "name": "Rb",
      "type": "resistor",
      "nodes": "out vss",
      "sizedBy": [
        "Rb"
      ],
      "role": "bleed: the least MP always carries"
    },
    {
      "name": "Rz",
      "type": "resistor",
      "nodes": "gate cz",
      "sizedBy": [
        "Rz"
      ],
      "role": "zero resistor, in series with Cc"
    },
    {
      "name": "Cc",
      "type": "capacitor",
      "nodes": "cz out",
      "sizedBy": [
        "Cc"
      ],
      "role": "Miller capacitor across the pass device"
    }
  ],
  "intent": [
    {
      "rule": "match",
      "of": [
        "M1",
        "M2"
      ],
      "why": "The input pair: any difference between them is an offset, and with unity feedback it is the output's error one for one."
    },
    {
      "rule": "match",
      "of": [
        "M3",
        "M4"
      ],
      "why": "The mirror load: a mismatch copies the wrong current onto gate and appears as offset."
    },
    {
      "rule": "unit-copies",
      "of": [
        "MB",
        "MT"
      ],
      "constraint": "MT = N copies of MB",
      "why": "The tail current is set by repeating the bias device, never by drawing a wider one: copies share nominal geometry-dependent behavior, while random mismatch remains."
    },
    {
      "rule": "rating",
      "of": [
        "MP",
        "M1",
        "M2",
        "M3",
        "M4",
        "MB",
        "MT"
      ],
      "constraint": "3.3 V devices throughout",
      "why": "The input is the 3.3 V I/O supply: every node can reach it, far above the 1.32 V a core device may see. Its purpose is exactly that - making the core supply from the only higher supply the chip has."
    },
    {
      "rule": "release",
      "of": [
        "MT",
        "Cc",
        "MP",
        "Rb"
      ],
      "constraint": "release overshoot at most 0.11 V and absolute output at most 1.32 V",
      "why": "The output powers 1.2 V devices rated 1.32 V. On a release MP's gate must rise, reducing V_SG by about 0.4 V, before it lets go of 10 mA; the tail current slewing Cc, a wide MP and the bleed that narrows that swing are sized so the peak stays under 1.32 V."
    },
    {
      "rule": "zero",
      "of": [
        "Rz",
        "MP",
        "M2"
      ],
      "constraint": "1/g_m,MP at no load < Rz < 1/g_m2",
      "why": "Above the lower bound the zero Cc makes is in the left half-plane at every load; below the upper one the loop gain above that zero, about g_m2 Rz, stays under 0 dB, so the crossover does not wander up with the load."
    },
    {
      "rule": "pole-splitting",
      "of": [
        "Cc",
        "MP",
        "Rb"
      ],
      "constraint": "g_m,MP/C_L at no load above twice g_m2/Cc",
      "why": "Cc makes gate the dominant pole; the output pole, g_m,MP over the load capacitance, is lowest at no load, where MP carries only the bleed's 200 µA."
    }
  ],
  "specs": [
    {
      "key": "vout",
      "label": "Output voltage",
      "unit": "V",
      "direction": "target",
      "constraint": ">= 1.17 V, <= 1.23 V",
      "min": 1.17,
      "max": 1.23,
      "why": "The 1.2 V reference, copied, within ±30 mV - a small part of the ±10 % the core devices it powers are specified over."
    },
    {
      "key": "i_q",
      "label": "Quiescent current",
      "unit": "A",
      "direction": "min",
      "constraint": "<= 0.0004 A",
      "min": null,
      "max": 0.0004,
      "why": "The 120 µA tail that slews the gate on a load release, and the 200 µA bleed: 4 % of the full load."
    },
    {
      "key": "load_reg",
      "label": "Load regulation",
      "unit": "V/A",
      "direction": "min",
      "constraint": "<= 1 V/A",
      "min": null,
      "max": 1,
      "why": "At most 10 mV from no load to 10 mA: the thick-oxide devices give the loop 70 dB or more."
    },
    {
      "key": "line_reg",
      "label": "Line regulation",
      "unit": "%/V",
      "direction": "min",
      "constraint": "<= 0.1 %/V",
      "min": null,
      "max": 0.1,
      "why": "At most 0.8 mV across the rated 2.97 to 3.63 V input."
    },
    {
      "key": "dropout",
      "label": "Dropout at full load",
      "unit": "V",
      "direction": "min",
      "constraint": "<= 0.25 V",
      "min": null,
      "max": 0.25,
      "why": "At 10 mA the output holds down to 1.45 V in: set by the amplifier pulling the gate low enough, with 2 V of headroom to spare at the rated input."
    },
    {
      "key": "loop_gain_db",
      "label": "DC loop gain at full load",
      "unit": "dB",
      "direction": "max",
      "constraint": ">= 70 dB",
      "min": 70,
      "max": null,
      "why": "Thick-oxide devices at 3.3 V have large output resistances, and the pass device runs saturated with 2.1 V across it."
    },
    {
      "key": "loop_ugf_hz",
      "label": "Loop crossover at full load",
      "unit": "Hz",
      "direction": "max",
      "constraint": ">= 1000000 Hz",
      "min": 1000000,
      "max": null,
      "why": "Set by g_m2 over Cc; fast enough to catch a 1 µs load edge on 100 pF."
    },
    {
      "key": "loop_pm_deg",
      "label": "Loop phase margin, worst load",
      "unit": "deg",
      "direction": "max",
      "constraint": ">= 60 deg",
      "min": 60,
      "max": null,
      "why": "At every load; the least at no load and hot, where the output pole is lowest."
    },
    {
      "key": "ring_pct",
      "label": "Ringing after a kick, worst load",
      "unit": "%",
      "direction": "min",
      "constraint": "<= 5 %",
      "min": null,
      "max": 5,
      "why": "No load of the range may leave the output ringing after a small step."
    },
    {
      "key": "psrr_db",
      "label": "Supply rejection at 1 kHz",
      "unit": "dB",
      "direction": "max",
      "constraint": ">= 50 dB",
      "min": 50,
      "max": null,
      "why": "At 1 kHz, where the loop's gain rejects the I/O supply's ripple."
    },
    {
      "key": "undershoot",
      "label": "Undershoot on the load step",
      "unit": "V",
      "direction": "min",
      "constraint": "<= 0.11 V",
      "min": null,
      "max": 0.11,
      "why": "For a 0 to 10 mA step in 1 µs on 100 pF."
    },
    {
      "key": "overshoot",
      "label": "Overshoot on the load release",
      "unit": "V",
      "direction": "min",
      "constraint": "<= 0.11 V",
      "min": null,
      "max": 0.11,
      "why": "At most 0.11 V above the pre-release full-load level; the separate absolute-peak limit checks the core-voltage ceiling."
    },
    {
      "key": "vout_peak",
      "label": "Maximum absolute output voltage",
      "unit": "V",
      "direction": "min",
      "constraint": "<= 1.32 V",
      "min": null,
      "max": 1.32,
      "why": "The absolute output, including both load-step and line-step waveforms, must not exceed the stated 1.32 V core-supply ceiling. Relative overshoot alone does not enforce it."
    },
    {
      "key": "t_recover",
      "label": "Settling after the load step",
      "unit": "s",
      "direction": "min",
      "constraint": "<= 0.000003 s",
      "min": null,
      "max": 0.000003,
      "why": "Back within 1 % after the step."
    },
    {
      "key": "t_release",
      "label": "Settling after the load release",
      "unit": "s",
      "direction": "min",
      "constraint": "<= 0.000003 s",
      "min": null,
      "max": 0.000003,
      "why": "Back within 1 % after the release, at no load."
    },
    {
      "key": "line_step",
      "label": "Output step for an input step",
      "unit": "V",
      "direction": "min",
      "constraint": "<= 0.08 V",
      "min": null,
      "max": 0.08,
      "why": "For the I/O supply stepping across its whole rated range in 1 µs at full load: still inside the core devices' rating."
    },
    {
      "key": "vn_out",
      "label": "Output noise, 10 Hz to 100 kHz",
      "unit": "V",
      "direction": "min",
      "constraint": "<= 0.00003 V",
      "min": null,
      "max": 0.00003,
      "why": "10 Hz to 100 kHz, rms: the input pair's noise, one for one at the output."
    }
  ],
  "explanation": {
    "idea": "Regulates a 3.3 V input down to the 1.2 V core supply. A five-transistor amplifier compares the output with a reference and drives a PMOS pass gate. Compensation stabilizes the loop; enough gate-drive current is needed to limit overshoot when the load is released.",
    "detail": "The 1.2 V core supply made from the 3.3 V I/O supply. The input is above what any 1.2 V device may see, so every transistor is a 3.3 V one; the output copies a 1.2 V reference through unity feedback to a five-transistor error amplifier. The thick-oxide devices give a great deal of gain - 88 dB of loop gain - and the design's hardest limit is on the other side: the output powers 1.2 V devices, rated 1.32 V, so the absolute transient peak must respect the load's voltage limit, including DC error.",
    "lesson": {
      "relation": 0,
      "symbols": "V_out is regulated output voltage; V_ref is the externally supplied reference, sensed with unity feedback.",
      "assumptions": "Sufficient DC loop gain, small input offset and enough input and pass-device headroom. The reference is ideal in the bench.",
      "exercise": {
        "param": "Vref",
        "value": 1.1,
        "analysis": "op",
        "expect": "The output should follow the reference down toward 1.1 V. This intentionally moves away from the fixed 1.2 V default-design target."
      },
      "limits": "Connect sense to out and provide the reference and bias current. Check the absolute output peak, including DC error and transient overshoot, before powering a core-voltage load."
    },
    "path": [
      {
        "part": "Error amplifier",
        "devices": "M1, M2, M3, M4, MT",
        "does": "M1 senses the output, M2 the reference; the mirror M3, M4 turns M1's current onto gate, so a rise in the output lifts gate."
      },
      {
        "part": "Pass device",
        "devices": "MP",
        "does": "A 3.3 V PMOS from the 3.3 V input: a higher gate means less current. With 2.1 V across it, it runs saturated and its own gain is large."
      },
      {
        "part": "Miller compensation",
        "devices": "Rz, Cc",
        "does": "Cc across MP makes gate the dominant pole; Rz in series puts the zero in the left half-plane."
      },
      {
        "part": "Bleed",
        "devices": "Rb",
        "does": "200 µA through MP with no load: its g_m there places the output pole, and it narrows the swing of MP's V_SG between no load and full load."
      }
    ],
    "bias": "Ib, 5 µA from outside, flows into the diode MB; the tail MT is 24 copies of it, 120 µA, which is what slews gate fast enough on a load release. The reference is an input, 1.2 V; the input is 3.3 V (2.97 to 3.63 V).",
    "relations": [
      {
        "what": "Output voltage",
        "expr": "V_out ≈ V_ref",
        "note": "Unity feedback."
      },
      {
        "what": "Zero resistor",
        "expr": "1/g_m,MP(no load) < Rz < 1/g_m2",
        "note": "Above the lower bound the zero is in the left half-plane; below the upper one the loop gain above the zero, about g_m2 · Rz, stays under 0 dB."
      },
      {
        "what": "Gate slew on load release",
        "expr": "t_gate ≈ C_eff · ΔV_gate / I_charge",
        "note": "t_gate estimates gate-slew time. On load release the gate rises, V_SG falls and MP supplies less current. ΔV_gate is the required positive gate rise, C_eff its effective load and I_charge the available charging current; the delay contributes to output overshoot."
      },
      {
        "what": "Loop gain",
        "expr": "T ≈ g_m2 · (r_o2 ∥ r_o4) · g_m,MP · R_o",
        "note": "Thick-oxide devices at 3.3 V have large r_o, and MP is saturated with 2.1 V across it."
      }
    ],
    "tradeoffs": [
      "Tail current (N): the release overshoot falls as it grows - 120 µA keeps it under 0.12 V at every corner - but it adds to the quiescent current alongside the 200 µA bleed.",
      "Wpass: a wider MP needs less V_SG swing between no load and full load, so less overshoot, at the cost of gate capacitance.",
      "Rb: a larger bleed narrows the V_SG swing and raises the output pole; it is quiescent current too.",
      "Cc: larger adds margin but slows the gate and raises the overshoot."
    ]
  },
  "sizing": [
    {
      "key": "Ib",
      "label": "Bias current",
      "unit": "A",
      "value": 0.000005,
      "min": 0.000001,
      "max": 0.00005,
      "kind": "si"
    },
    {
      "key": "N",
      "label": "Tail current, in Ib",
      "unit": "",
      "value": 24,
      "min": 1,
      "max": 40,
      "kind": "int"
    },
    {
      "key": "Wn",
      "label": "W NMOS bias unit (MB, MT)",
      "unit": "m",
      "value": 0.000008,
      "min": 5e-7,
      "max": 0.00004,
      "kind": "si"
    },
    {
      "key": "Ln",
      "label": "L NMOS bias unit",
      "unit": "m",
      "value": 0.000001,
      "min": 4.5e-7,
      "max": 0.000004,
      "kind": "si"
    },
    {
      "key": "W1",
      "label": "W input pair (M1, M2)",
      "unit": "m",
      "value": 0.00004,
      "min": 0.000001,
      "max": 0.0002,
      "kind": "si"
    },
    {
      "key": "L1",
      "label": "L input pair",
      "unit": "m",
      "value": 0.000002,
      "min": 4.5e-7,
      "max": 0.000008,
      "kind": "si"
    },
    {
      "key": "Wp",
      "label": "W mirror (M3, M4)",
      "unit": "m",
      "value": 0.00004,
      "min": 0.000001,
      "max": 0.0002,
      "kind": "si"
    },
    {
      "key": "Lp",
      "label": "L mirror",
      "unit": "m",
      "value": 0.000002,
      "min": 4.5e-7,
      "max": 0.000008,
      "kind": "si"
    },
    {
      "key": "Wpass",
      "label": "W pass device",
      "unit": "m",
      "value": 0.0024,
      "min": 0.00002,
      "max": 0.006,
      "kind": "si"
    },
    {
      "key": "Lpass",
      "label": "L pass device",
      "unit": "m",
      "value": 4.5e-7,
      "min": 4.5e-7,
      "max": 0.000002,
      "kind": "si"
    },
    {
      "key": "Rb",
      "label": "Bleed resistor",
      "unit": "Ω",
      "value": 6000,
      "min": 1000,
      "max": 200000,
      "kind": "si"
    },
    {
      "key": "Rz",
      "label": "Zero resistor",
      "unit": "Ω",
      "value": 1500,
      "min": 200,
      "max": 20000,
      "kind": "si"
    },
    {
      "key": "Cc",
      "label": "Miller capacitor",
      "unit": "F",
      "value": 2e-11,
      "min": 1e-12,
      "max": 2e-10,
      "kind": "si"
    },
    {
      "key": "Vref",
      "label": "Reference",
      "unit": "V",
      "value": 1.2,
      "min": 1,
      "max": 1.3,
      "kind": "si"
    },
    {
      "key": "IL",
      "label": "Full load",
      "unit": "A",
      "value": 0.01,
      "min": 0.001,
      "max": 0.03,
      "kind": "si"
    },
    {
      "key": "CL",
      "label": "Load capacitance",
      "unit": "F",
      "value": 1e-10,
      "min": 1e-11,
      "max": 1e-9,
      "kind": "si"
    }
  ],
  "testbenches": [
    {
      "id": "op",
      "label": "Operating point",
      "note": "The regulator at its nominal input and its lightest load: the output it holds and the current it draws to hold it.",
      "measures": [],
      "metricKeys": [
        "vout",
        "i_q"
      ],
      "acceptance": [
        "vout",
        "i_q"
      ],
      "acceptanceRules": [
        {
          "key": "vout",
          "unit": "V",
          "min": 1.17,
          "max": 1.23,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        },
        {
          "key": "i_q",
          "unit": "A",
          "min": null,
          "max": 0.0004,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - operating point at the lightest load\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n.param VDD=3.3\nVdd vdd 0 dc {VDD}\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 dc 0\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.op\n.end"
    },
    {
      "id": "load_reg",
      "label": "Load regulation",
      "note": "The load is swept from lightest to full at nominal input. Regulation is the magnitude of the endpoint output change per ampere; a large output rise fails just as a large fall does.",
      "measures": [],
      "metricKeys": [
        "load_reg"
      ],
      "acceptance": [
        "load_reg"
      ],
      "acceptanceRules": [
        {
          "key": "load_reg",
          "unit": "V/A",
          "min": null,
          "max": 1,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - output against load current\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n.param VDD=3.3\nVdd vdd 0 dc {VDD}\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 dc 0\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.dc Vload 0 10m 100u\n* Measured by this deck, so a local ngspice run reports the same figures:\n.meas dc v_light FIND v(out) AT=0\n.meas dc v_full FIND v(out) AT=10m\n.end"
    },
    {
      "id": "line_reg",
      "label": "Line regulation",
      "note": "The input swept across its rated range, at the lightest and at the full load: how much of the input's change reaches the output.",
      "measures": [],
      "metricKeys": [
        "line_reg"
      ],
      "acceptance": [
        "line_reg"
      ],
      "acceptanceRules": [
        {
          "key": "line_reg",
          "unit": "%/V",
          "min": null,
          "max": 0.1,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - output against input voltage\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n* the input swept across its rated range, 2.97V to 3.63V\nVdd vdd 0 dc 3.3\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 dc 0\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n* the input swept at each of two loads: the lightest, then the full load\n.dc Vdd 2.97 3.63 13.75m Vload 0 10m 10m\n.end"
    },
    {
      "id": "dropout",
      "label": "Dropout",
      "note": "The input lowered at full load until the output has fallen 2 % below the level it holds at the nominal input: the input-to-output voltage left there is the dropout.",
      "measures": [],
      "metricKeys": [
        "dropout"
      ],
      "acceptance": [
        "dropout"
      ],
      "acceptanceRules": [
        {
          "key": "dropout",
          "unit": "V",
          "min": null,
          "max": 0.25,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - dropout at full load\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n* the input swept down to below the output: 900mV to 3.63V\nVdd vdd 0 dc 3.3\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 dc 10m\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.dc Vdd 900m 3.63 13.65m\n.end"
    },
    {
      "id": "loop",
      "label": "Loop gain",
      "note": "The loop gain at loads across the whole range, from the lightest to the full load: the loop is cut at the sense line and measured by Middlebrook's double injection - a voltage in series there, then a current into out - which gives it exactly, with every loading in place. The phase and gain margins are the worst over the loads.",
      "measures": [],
      "metricKeys": [
        "loop_gain_db",
        "loop_ugf_hz",
        "loop_pm_deg",
        "loop_gm_db"
      ],
      "acceptance": [
        "loop_gain_db",
        "loop_ugf_hz",
        "loop_pm_deg"
      ],
      "acceptanceRules": [
        {
          "key": "loop_gain_db",
          "unit": "dB",
          "min": 70,
          "max": null,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        },
        {
          "key": "loop_ugf_hz",
          "unit": "Hz",
          "min": 1000000,
          "max": null,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        },
        {
          "key": "loop_pm_deg",
          "unit": "deg",
          "min": 60,
          "max": null,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - loop gain at 10mA, voltage injection\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n.param VDD=3.3\nVdd vdd 0 dc {VDD}\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line cut by a 1 V ac source in series: T_v = -v(out)/v(sense)\nVinj sense out dc 0 ac 1\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 dc 10m\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.ac dec 20 0.1 1g\n.end"
    },
    {
      "id": "ring",
      "label": "Ringing across the loads",
      "note": "The loads the loop bench visits, in a staircase from the lightest to the full load; at each, once the output has settled, a small step - a tenth more load. How far the output overshoots its new level on the way back, and what is left moving at the end of each step, show whether the regulator is damped at that load: a loop inside it that the sense line does not pass through, and so the loop gain cannot see, shows here.",
      "measures": [],
      "metricKeys": [
        "ring_pct"
      ],
      "acceptance": [
        "ring_pct"
      ],
      "acceptanceRules": [
        {
          "key": "ring_pct",
          "unit": "%",
          "min": null,
          "max": 5,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - a small load step at each load\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n.param VDD=3.3\nVdd vdd 0 dc {VDD}\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 pwl(0 0 8u 0 8.4u 40u 20u 40u 20.4u 10u 28u 10u 28.4u 50u 40u 50u 40.4u 100u 48u 100u 48.4u 140u 60u 140u 60.4u 1m 68u 1m 68.4u 1.1m 80u 1.1m 80.4u 10m 88u 10m 88.4u 11m 100u 11m)\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.tran 10n 100u\n.end"
    },
    {
      "id": "psrr",
      "label": "Supply rejection",
      "note": "A ripple on the input, at the lightest and at the full load: how much of it reaches the output.",
      "measures": [],
      "metricKeys": [
        "psrr_db",
        "psrr_hf_db"
      ],
      "acceptance": [
        "psrr_db"
      ],
      "acceptanceRules": [
        {
          "key": "psrr_db",
          "unit": "dB",
          "min": 50,
          "max": null,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - supply rejection at 10mA\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n.param VDD=3.3\nVdd vdd 0 dc {VDD} ac 1\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 dc 10m\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.ac dec 20 1 100meg\n.end"
    },
    {
      "id": "load_step",
      "label": "Load step",
      "note": "The load stepped from the lightest to the full load and back, each edge 1.00 µs: how far the output dips and peaks, and how long it takes to settle within 1 % after each edge. A loop that rings or oscillates at either load shows here, whatever the loop gain says.",
      "measures": [],
      "metricKeys": [
        "undershoot",
        "overshoot",
        "vout_peak",
        "t_recover",
        "t_release"
      ],
      "acceptance": [
        "undershoot",
        "overshoot",
        "vout_peak",
        "t_recover",
        "t_release"
      ],
      "acceptanceRules": [
        {
          "key": "undershoot",
          "unit": "V",
          "min": null,
          "max": 0.11,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        },
        {
          "key": "overshoot",
          "unit": "V",
          "min": null,
          "max": 0.11,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        },
        {
          "key": "vout_peak",
          "unit": "V",
          "min": null,
          "max": 1.32,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        },
        {
          "key": "t_recover",
          "unit": "s",
          "min": null,
          "max": 0.000003,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        },
        {
          "key": "t_release",
          "unit": "s",
          "min": null,
          "max": 0.000003,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - load step\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n.param VDD=3.3\nVdd vdd 0 dc {VDD}\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 pulse(0 10m 4u 1u 1u 17u 80u)\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.tran 8n 40u\n.end"
    },
    {
      "id": "line_step",
      "label": "Line step",
      "note": "The input stepped across its rated range, 2.97 V to 3.63 V, and back, each edge 1.00 µs, at full load: how far the output moves.",
      "measures": [],
      "metricKeys": [
        "line_step",
        "vout_peak"
      ],
      "acceptance": [
        "line_step",
        "vout_peak"
      ],
      "acceptanceRules": [
        {
          "key": "line_step",
          "unit": "V",
          "min": null,
          "max": 0.08,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        },
        {
          "key": "vout_peak",
          "unit": "V",
          "min": null,
          "max": 1.32,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - line step at full load\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n* the input steps across its rated range and back\nVdd vdd 0 pulse(2.97 3.63 4u 1u 1u 17u 80u)\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 dc 10m\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.tran 8n 40u\n.end"
    },
    {
      "id": "noise",
      "label": "Output noise",
      "note": "The noise at the output at full load: its density at 1 kHz and its total from 10 Hz to 100 kHz. The reference is an ideal, noiseless source, so this is the regulator's own noise.",
      "measures": [],
      "metricKeys": [
        "vn_out",
        "vn_out_1k"
      ],
      "acceptance": [
        "vn_out"
      ],
      "acceptanceRules": [
        {
          "key": "vn_out",
          "unit": "V",
          "min": null,
          "max": 0.00003,
          "classification": "simulation-limit",
          "conditions": "all requested testbench conditions",
          "outsideScope": "characterization; the measurement must still be present, unique and finite"
        }
      ],
      "cards": [
        "sg13g2_hv_tt.spice",
        "sg13g2_passive_tt.spice"
      ],
      "netlist": "* Core-supply LDO from 3.3 V - output noise at full load\n.include sg13g2_hv_tt.spice\n.include sg13g2_passive_tt.spice\n.param VDD=3.3\n* ac 1 only because ngspice's noise analysis names an input; the output noise does not depend on it\nVdd vdd 0 dc {VDD} ac 1\nVref ref 0 dc 1.2\nIb vdd ib dc 5u\n.subckt ldo5thv ref sense out vdd vss ib\n* bias: the tail current, N copies of the reference Ib\nXMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1\nXMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24\n* error amplifier: the output on the diode side, so a rise lifts gate\nXM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1\nXM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\nXM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1\n* the pass device and its bleed\nXMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1\nXRb out vss vss rppd w=0.5u l=11.54u\n* Miller compensation across the pass device, the zero resistor in series\nXRz gate cz vss rppd w=0.5u l=2.678u\nXCc cz out cap_cmim w=29.761u l=29.761u m=15\n.ends\nXdut ref sense out vdd 0 ib ldo5thv\n* the sense line: the regulator reads its output here\nVsense sense out 0\nCl out 0 100p\n* the load: v(il) amperes drawn from out, falling to none as out falls below 50 mV\nVload il 0 dc 10m\nBload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)\n.control\nnoise v(out) Vdd dec 20 10 100k\nsetplot noise1\n* 20 points a decade from 10 Hz: point 40 is 1 kHz\nlet vn_1k = onoise_spectrum[40]\nprint vn_1k\nsetplot noise2\nprint onoise_total\n.endc\n.op\n.end"
    }
  ],
  "measurements": {
    "vout": {
      "label": "Output voltage",
      "unit": "V",
      "spec": {
        "min": 1.17,
        "max": 1.23
      }
    },
    "i_q": {
      "label": "Quiescent current",
      "unit": "A",
      "spec": {
        "min": null,
        "max": 0.0004
      }
    },
    "load_reg": {
      "label": "Load regulation",
      "unit": "V/A",
      "spec": {
        "min": null,
        "max": 1
      }
    },
    "line_reg": {
      "label": "Line regulation",
      "unit": "%/V",
      "spec": {
        "min": null,
        "max": 0.1
      }
    },
    "dropout": {
      "label": "Dropout at full load",
      "unit": "V",
      "spec": {
        "min": null,
        "max": 0.25
      }
    },
    "loop_gain_db": {
      "label": "DC loop gain at full load",
      "unit": "dB",
      "spec": {
        "min": 70,
        "max": null
      }
    },
    "loop_ugf_hz": {
      "label": "Loop crossover at full load",
      "unit": "Hz",
      "spec": {
        "min": 1000000,
        "max": null
      }
    },
    "loop_pm_deg": {
      "label": "Loop phase margin, worst load",
      "unit": "deg",
      "spec": {
        "min": 60,
        "max": null
      }
    },
    "ring_pct": {
      "label": "Ringing after a kick, worst load",
      "unit": "%",
      "spec": {
        "min": null,
        "max": 5
      }
    },
    "psrr_db": {
      "label": "Supply rejection at 1 kHz",
      "unit": "dB",
      "spec": {
        "min": 50,
        "max": null
      }
    },
    "undershoot": {
      "label": "Undershoot on the load step",
      "unit": "V",
      "spec": {
        "min": null,
        "max": 0.11
      }
    },
    "overshoot": {
      "label": "Overshoot on the load release",
      "unit": "V",
      "spec": {
        "min": null,
        "max": 0.11
      }
    },
    "vout_peak": {
      "label": "Maximum absolute output voltage",
      "unit": "V",
      "spec": {
        "min": null,
        "max": 1.32
      }
    },
    "t_recover": {
      "label": "Settling after the load step",
      "unit": "s",
      "spec": {
        "min": null,
        "max": 0.000003
      }
    },
    "t_release": {
      "label": "Settling after the load release",
      "unit": "s",
      "spec": {
        "min": null,
        "max": 0.000003
      }
    },
    "line_step": {
      "label": "Output step for an input step",
      "unit": "V",
      "spec": {
        "min": null,
        "max": 0.08
      }
    },
    "vn_out": {
      "label": "Output noise, 10 Hz to 100 kHz",
      "unit": "V",
      "spec": {
        "min": null,
        "max": 0.00003
      }
    }
  },
  "recordVersion": 1,
  "authoring": {
    "version": 1,
    "source": "this-record",
    "fields": [
      "name",
      "title",
      "group",
      "subgroup",
      "summary",
      "reference",
      "ports",
      "devices (except fingers/copies)",
      "intent",
      "specs",
      "explanation",
      "sizing[].label",
      "testbenches[].label",
      "testbenches[].note"
    ],
    "generated": [
      "revision",
      "technology",
      "cards",
      "corners",
      "specificationPolicy",
      "sizing (except label)",
      "measurements",
      "testbenches (except label/note)",
      "diagrams",
      "provenance",
      "devices[].fingers",
      "devices[].copies"
    ],
    "workflow": "Edit author-owned fields in this JSON, then run tools/export-circuits.mjs. Change executable circuit generators for numerical changes; rebuild and requalify those changes. The build preserves authored content.",
    "sha256": "901eea98eec2696760786c6bd018055e8a956c19a643d4b77802b4ead1636967"
  },
  "provenance": {
    "schema": "aisic.record-provenance/1",
    "parameterScope": "published-defaults",
    "generator": {
      "url": "/library/ldo-5t-hv.js",
      "sha256": "2bec06508fd30d27942ea4fb43c22b62d316a4e20a144b5b4aa72918afa48582"
    },
    "simulationFingerprints": {
      "op": "5d45104f41bf3f2da8a442872f10b97d2c1378bd6af595f0cbd52d546bd1c819",
      "load_reg": "06d72a87fdbb3eaccf8b8c7964d63e83a9d12ee26116887eebaf1b8073bd7090",
      "line_reg": "47374af83aa91685e3bd673bb04889de1177f83a57f03d5024939d4913bf333f",
      "dropout": "095903c83669028c24236939ccdd86755264fe0afaa209d8454984189f560dc1",
      "loop": "a01585fc666efb994c746255ed16da4cb7772b1c72eda6ca872acbc97b2ec233",
      "ring": "b1a98c837ff078671f378e374576a3714953ad1a82424f1bb66d81e3508980fd",
      "psrr": "7662eb96d708bc2fa56d3883b9a2859598659db03fc1df43f30b0921af15acac",
      "load_step": "fd26e6625a054407bbabecc2f3b147d15351708b2807de769f738fcd27f8083b",
      "line_step": "73775210734fe2cdab5e13dad34b2c7d32066e1cf0afff7f38d4650305fdaa1c",
      "noise": "f912358bd50c06ba387422be888ebe5af05a8e3e6f75f57182c3f5dcf06d249e"
    },
    "meaning": "Fingerprints identify simulation inputs, not a passing result. Follow resources.achieved for measured evidence and compare its fingerprints. Explanatory edits do not establish new physical qualification."
  },
  "revision": "3170a227275bddb6aa07e739706324962e84dfbe284f7ac26b04f2e100a82db2",
  "diagrams": {
    "schema": "aisic.diagrams/1",
    "circuit": "ldo-5t-hv",
    "parameters": {
      "Ib": 0.000005,
      "N": 24,
      "Wn": 0.000008,
      "Ln": 0.000001,
      "W1": 0.00004,
      "L1": 0.000002,
      "Wp": 0.00004,
      "Lp": 0.000002,
      "Wpass": 0.0024,
      "Lpass": 4.5e-7,
      "Rb": 6000,
      "Rz": 1500,
      "Cc": 2e-11,
      "Vref": 1.2,
      "IL": 0.01,
      "CL": 1e-10
    },
    "parameterScope": "published-defaults",
    "boundary": "Electrical graphs retain physical device terminals; SVG symbols can collapse tied bipolar terminals, group transmission gates or hide passive substrates. Neither view is layout or a fabrication netlist.",
    "variants": {
      "choiceParameters": [],
      "coverage": "This bundle represents only the selected values. Declared choices can be regenerated; numeric ranges and combinations are not exhaustively qualified by diagram generation."
    },
    "resourceBase": "/circuits/ldo-5t-hv/",
    "graphs": [
      {
        "id": "graph-1",
        "kind": "electrical-connectivity",
        "boundary": "Device pins and net incidence from the generated SPICE deck, including ideal bench elements. PDK/model internals are referenced, not expanded. This is not layout, extraction, DRC/LVS or silicon evidence.",
        "root": "dut",
        "globalDefinitions": [
          ".param VDD=3.3"
        ],
        "scopes": [
          {
            "id": "dut",
            "name": "ldo5thv",
            "ports": [
              {
                "name": "ref",
                "net": "ref",
                "kind": "input"
              },
              {
                "name": "sense",
                "net": "sense",
                "kind": "input"
              },
              {
                "name": "out",
                "net": "out",
                "kind": "output"
              },
              {
                "name": "vdd",
                "net": "vdd",
                "kind": "supply"
              },
              {
                "name": "vss",
                "net": "vss",
                "kind": "ground"
              },
              {
                "name": "ib",
                "net": "ib",
                "kind": "bias"
              }
            ],
            "definitions": [],
            "devices": [
              {
                "id": "XMB",
                "displayName": "MB",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=1",
                "source": "XMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "ib"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMT",
                "displayName": "MT",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=24",
                "source": "XMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24",
                "pins": [
                  {
                    "id": "d",
                    "net": "tail"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM1",
                "displayName": "M1",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "sense"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM2",
                "displayName": "M2",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "ref"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM3",
                "displayName": "M3",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM4",
                "displayName": "M4",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMP",
                "displayName": "MP",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=2.4m l=450n ng=480 m=1",
                "source": "XMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "out"
                  },
                  {
                    "id": "g",
                    "net": "gate"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XRb",
                "displayName": "Rb",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=11.54u",
                "source": "XRb out vss vss rppd w=0.5u l=11.54u",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "vss"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
                "displayName": "Rz",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=2.678u",
                "source": "XRz gate cz vss rppd w=0.5u l=2.678u",
                "pins": [
                  {
                    "id": "p",
                    "net": "gate"
                  },
                  {
                    "id": "n",
                    "net": "cz"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
                "spiceType": "X",
                "model": "cap_cmim",
                "parametersOrValue": "w=29.761u l=29.761u m=15",
                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "IHP MIM model terminal order"
              }
            ],
            "nets": [
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "d"
                  },
                  {
                    "device": "XMB",
                    "pin": "g"
                  },
                  {
                    "device": "XMT",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ib"
                ],
                "voltageReferences": []
              },
              {
                "id": "vss",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "s"
                  },
                  {
                    "device": "XMB",
                    "pin": "b"
                  },
                  {
                    "device": "XMT",
                    "pin": "s"
                  },
                  {
                    "device": "XMT",
                    "pin": "b"
                  },
                  {
                    "device": "XM1",
                    "pin": "b"
                  },
                  {
                    "device": "XM2",
                    "pin": "b"
                  },
                  {
                    "device": "XRb",
                    "pin": "n"
                  },
                  {
                    "device": "XRb",
                    "pin": "substrate"
                  },
                  {
                    "device": "XRz",
                    "pin": "substrate"
                  }
                ],
                "ports": [
                  "vss"
                ],
                "voltageReferences": []
              },
              {
                "id": "tail",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMT",
                    "pin": "d"
                  },
                  {
                    "device": "XM1",
                    "pin": "s"
                  },
                  {
                    "device": "XM2",
                    "pin": "s"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "g"
                  },
                  {
                    "device": "XM4",
                    "pin": "g"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "sense"
                ],
                "voltageReferences": []
              },
              {
                "id": "gate",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "d"
                  },
                  {
                    "device": "XM4",
                    "pin": "d"
                  },
                  {
                    "device": "XMP",
                    "pin": "g"
                  },
                  {
                    "device": "XRz",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ref"
                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM3",
                    "pin": "s"
                  },
                  {
                    "device": "XM3",
                    "pin": "b"
                  },
                  {
                    "device": "XM4",
                    "pin": "s"
                  },
                  {
                    "device": "XM4",
                    "pin": "b"
                  },
                  {
                    "device": "XMP",
                    "pin": "s"
                  },
                  {
                    "device": "XMP",
                    "pin": "b"
                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMP",
                    "pin": "d"
                  },
                  {
                    "device": "XRb",
                    "pin": "p"
                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
                "terminals": [
                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ]
      },
      {
        "id": "graph-2",
        "kind": "electrical-connectivity",
        "boundary": "Device pins and net incidence from the generated SPICE deck, including ideal bench elements. PDK/model internals are referenced, not expanded. This is not layout, extraction, DRC/LVS or silicon evidence.",
        "root": "top",
        "globalDefinitions": [
          ".param VDD=3.3"
        ],
        "scopes": [
          {
            "id": "top",
            "name": "top",
            "ports": [],
            "definitions": [
              ".param VDD=3.3"
            ],
            "devices": [
              {
                "id": "Vdd",
                "displayName": "Vdd",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc {VDD}",
                "source": "Vdd vdd 0 dc {VDD}",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vref",
                "displayName": "Vref",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 1.2",
                "source": "Vref ref 0 dc 1.2",
                "pins": [
                  {
                    "id": "p",
                    "net": "ref"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Ib",
                "displayName": "Ib",
                "spiceType": "I",
                "model": null,
                "parametersOrValue": "dc 5u",
                "source": "Ib vdd ib dc 5u",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Xdut",
                "displayName": "Xdut",
                "spiceType": "X",
                "model": "ldo5thv",
                "parametersOrValue": "",
                "source": "Xdut ref sense out vdd 0 ib ldo5thv",
                "pins": [
                  {
                    "id": "ref",
                    "net": "ref"
                  },
                  {
                    "id": "sense",
                    "net": "sense"
                  },
                  {
                    "id": "out",
                    "net": "out"
                  },
                  {
                    "id": "vdd",
                    "net": "vdd"
                  },
                  {
                    "id": "vss",
                    "net": "0"
                  },
                  {
                    "id": "ib",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "Declared .subckt port order",
                "subcircuit": "subckt/ldo5thv"
              },
              {
                "id": "Vsense",
                "displayName": "Vsense",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "0",
                "source": "Vsense sense out 0",
                "pins": [
                  {
                    "id": "p",
                    "net": "sense"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Cl",
                "displayName": "Cl",
                "spiceType": "C",
                "model": null,
                "parametersOrValue": "100p",
                "source": "Cl out 0 100p",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vload",
                "displayName": "Vload",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 0",
                "source": "Vload il 0 dc 0",
                "pins": [
                  {
                    "id": "p",
                    "net": "il"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Bload",
                "displayName": "Bload",
                "spiceType": "B",
                "model": null,
                "parametersOrValue": "i=v(il)*min(1, max(v(out), 0)/0.05)",
                "source": "Bload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order",
                "expressionDependencies": {
                  "voltageNets": [
                    "il",
                    "out"
                  ],
                  "currentDevices": []
                }
              }
            ],
            "nets": [
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "p"
                  },
                  {
                    "device": "Ib",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vdd"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "0",
                "ground": true,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "n"
                  },
                  {
                    "device": "Vref",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vss"
                  },
                  {
                    "device": "Cl",
                    "pin": "n"
                  },
                  {
                    "device": "Vload",
                    "pin": "n"
                  },
                  {
                    "device": "Bload",
                    "pin": "n"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vref",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ref"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "Ib",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ib"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "sense"
                  },
                  {
                    "device": "Vsense",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "out"
                  },
                  {
                    "device": "Vsense",
                    "pin": "n"
                  },
                  {
                    "device": "Cl",
                    "pin": "p"
                  },
                  {
                    "device": "Bload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              },
              {
                "id": "il",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              }
            ]
          },
          {
            "id": "subckt/ldo5thv",
            "name": "ldo5thv",
            "ports": [
              {
                "name": "ref",
                "net": "ref"
              },
              {
                "name": "sense",
                "net": "sense"
              },
              {
                "name": "out",
                "net": "out"
              },
              {
                "name": "vdd",
                "net": "vdd"
              },
              {
                "name": "vss",
                "net": "vss"
              },
              {
                "name": "ib",
                "net": "ib"
              }
            ],
            "definitions": [],
            "devices": [
              {
                "id": "XMB",
                "displayName": "MB",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=1",
                "source": "XMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "ib"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMT",
                "displayName": "MT",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=24",
                "source": "XMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24",
                "pins": [
                  {
                    "id": "d",
                    "net": "tail"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM1",
                "displayName": "M1",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "sense"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM2",
                "displayName": "M2",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "ref"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM3",
                "displayName": "M3",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM4",
                "displayName": "M4",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMP",
                "displayName": "MP",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=2.4m l=450n ng=480 m=1",
                "source": "XMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "out"
                  },
                  {
                    "id": "g",
                    "net": "gate"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XRb",
                "displayName": "Rb",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=11.54u",
                "source": "XRb out vss vss rppd w=0.5u l=11.54u",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "vss"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
                "displayName": "Rz",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=2.678u",
                "source": "XRz gate cz vss rppd w=0.5u l=2.678u",
                "pins": [
                  {
                    "id": "p",
                    "net": "gate"
                  },
                  {
                    "id": "n",
                    "net": "cz"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
                "spiceType": "X",
                "model": "cap_cmim",
                "parametersOrValue": "w=29.761u l=29.761u m=15",
                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "IHP MIM model terminal order"
              }
            ],
            "nets": [
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "d"
                  },
                  {
                    "device": "XMB",
                    "pin": "g"
                  },
                  {
                    "device": "XMT",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ib"
                ],
                "voltageReferences": []
              },
              {
                "id": "vss",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "s"
                  },
                  {
                    "device": "XMB",
                    "pin": "b"
                  },
                  {
                    "device": "XMT",
                    "pin": "s"
                  },
                  {
                    "device": "XMT",
                    "pin": "b"
                  },
                  {
                    "device": "XM1",
                    "pin": "b"
                  },
                  {
                    "device": "XM2",
                    "pin": "b"
                  },
                  {
                    "device": "XRb",
                    "pin": "n"
                  },
                  {
                    "device": "XRb",
                    "pin": "substrate"
                  },
                  {
                    "device": "XRz",
                    "pin": "substrate"
                  }
                ],
                "ports": [
                  "vss"
                ],
                "voltageReferences": []
              },
              {
                "id": "tail",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMT",
                    "pin": "d"
                  },
                  {
                    "device": "XM1",
                    "pin": "s"
                  },
                  {
                    "device": "XM2",
                    "pin": "s"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "g"
                  },
                  {
                    "device": "XM4",
                    "pin": "g"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "sense"
                ],
                "voltageReferences": []
              },
              {
                "id": "gate",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "d"
                  },
                  {
                    "device": "XM4",
                    "pin": "d"
                  },
                  {
                    "device": "XMP",
                    "pin": "g"
                  },
                  {
                    "device": "XRz",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ref"
                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM3",
                    "pin": "s"
                  },
                  {
                    "device": "XM3",
                    "pin": "b"
                  },
                  {
                    "device": "XM4",
                    "pin": "s"
                  },
                  {
                    "device": "XM4",
                    "pin": "b"
                  },
                  {
                    "device": "XMP",
                    "pin": "s"
                  },
                  {
                    "device": "XMP",
                    "pin": "b"
                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMP",
                    "pin": "d"
                  },
                  {
                    "device": "XRb",
                    "pin": "p"
                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
                "terminals": [
                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ],
        "uninstantiatedDefinitions": [],
        "dut": {
          "kind": "subcircuit-instance",
          "scope": "top",
          "device": "Xdut",
          "definition": "subckt/ldo5thv"
        }
      },
      {
        "id": "graph-3",
        "kind": "functional-graph",
        "classification": "heuristic-device-grouping",
        "electricalScope": "dut",
        "boundary": "Automatic device-role grouping and shared-net hyperedges, not a verified behavioral signal-flow model. Shared nets do not establish direction, gain or causality; power nets are omitted here but retained in electrical connectivity. Any inferredStages values are transistor-depth hints, not gain-stage counts. The SVG shows device groups and net labels, or a separately authored functional diagram.",
        "nodes": [
          {
            "id": "block-1",
            "label": "Bias reference",
            "devices": [
              {
                "scope": "dut",
                "device": "XMB"
              }
            ],
            "inferredStages": [
              "bias"
            ]
          },
          {
            "id": "block-2",
            "label": "Error amplifier tail",
            "devices": [
              {
                "scope": "dut",
                "device": "XMT"
              }
            ],
            "inferredStages": [
              1
            ]
          },
          {
            "id": "block-3",
            "label": "Input pair",
            "devices": [
              {
                "scope": "dut",
                "device": "XM1"
              },
              {
                "scope": "dut",
                "device": "XM2"
              }
            ],
            "inferredStages": [
              1
            ]
          },
          {
            "id": "block-4",
            "label": "Mirror load",
            "devices": [
              {
                "scope": "dut",
                "device": "XM3"
              },
              {
                "scope": "dut",
                "device": "XM4"
              }
            ],
            "inferredStages": [
              1
            ]
          },
          {
            "id": "block-5",
            "label": "Pass device",
            "devices": [
              {
                "scope": "dut",
                "device": "XMP"
              }
            ],
            "inferredStages": [
              2
            ]
          },
          {
            "id": "block-6",
            "label": "Bleed: the least MP always carries",
            "devices": [
              {
                "scope": "dut",
                "device": "XRb"
              }
            ],
            "inferredStages": [
              2
            ]
          },
          {
            "id": "block-7",
            "label": "Zero resistor",
            "devices": [
              {
                "scope": "dut",
                "device": "XRz"
              }
            ],
            "inferredStages": [
              "comp"
            ]
          },
          {
            "id": "block-8",
            "label": "Miller capacitor across the pass device",
            "devices": [
              {
                "scope": "dut",
                "device": "XCc"
              }
            ],
            "inferredStages": [
              "comp"
            ]
          }
        ],
        "edges": [
          {
            "id": "net-1",
            "net": "ib",
            "nodes": [
              "block-1",
              "block-2"
            ],
            "direction": "undirected-shared-net"
          },
          {
            "id": "net-2",
            "net": "tail",
            "nodes": [
              "block-2",
              "block-3"
            ],
            "direction": "undirected-shared-net"
          },
          {
            "id": "net-3",
            "net": "d1",
            "nodes": [
              "block-3",
              "block-4"
            ],
            "direction": "undirected-shared-net"
          },
          {
            "id": "net-4",
            "net": "gate",
            "nodes": [
              "block-3",
              "block-4",
              "block-5",
              "block-7"
            ],
            "direction": "undirected-shared-net"
          },
          {
            "id": "net-5",
            "net": "out",
            "nodes": [
              "block-5",
              "block-6",
              "block-8"
            ],
            "direction": "undirected-shared-net"
          },
          {
            "id": "net-6",
            "net": "cz",
            "nodes": [
              "block-7",
              "block-8"
            ],
            "direction": "undirected-shared-net"
          }
        ],
        "ports": [
          {
            "name": "ref",
            "net": "ref",
            "kind": "input"
          },
          {
            "name": "sense",
            "net": "sense",
            "kind": "input"
          },
          {
            "name": "out",
            "net": "out",
            "kind": "output"
          },
          {
            "name": "vdd",
            "net": "vdd",
            "kind": "supply"
          },
          {
            "name": "vss",
            "net": "vss",
            "kind": "ground"
          },
          {
            "name": "ib",
            "net": "ib",
            "kind": "bias"
          }
        ],
        "coverage": "Every root DUT device belongs to one group; hierarchical instances refer to electrical child scopes."
      },
      {
        "id": "graph-4",
        "kind": "electrical-connectivity",
        "boundary": "Device pins and net incidence from the generated SPICE deck, including ideal bench elements. PDK/model internals are referenced, not expanded. This is not layout, extraction, DRC/LVS or silicon evidence.",
        "root": "dut",
        "globalDefinitions": [],
        "scopes": [
          {
            "id": "dut",
            "name": "ldo5thv",
            "ports": [
              {
                "name": "ref",
                "net": "ref",
                "kind": "input"
              },
              {
                "name": "sense",
                "net": "sense",
                "kind": "input"
              },
              {
                "name": "out",
                "net": "out",
                "kind": "output"
              },
              {
                "name": "vdd",
                "net": "vdd",
                "kind": "supply"
              },
              {
                "name": "vss",
                "net": "vss",
                "kind": "ground"
              },
              {
                "name": "ib",
                "net": "ib",
                "kind": "bias"
              }
            ],
            "definitions": [],
            "devices": [
              {
                "id": "XMB",
                "displayName": "MB",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=1",
                "source": "XMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "ib"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMT",
                "displayName": "MT",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=24",
                "source": "XMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24",
                "pins": [
                  {
                    "id": "d",
                    "net": "tail"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM1",
                "displayName": "M1",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "sense"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM2",
                "displayName": "M2",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "ref"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM3",
                "displayName": "M3",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM4",
                "displayName": "M4",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMP",
                "displayName": "MP",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=2.4m l=450n ng=480 m=1",
                "source": "XMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "out"
                  },
                  {
                    "id": "g",
                    "net": "gate"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XRb",
                "displayName": "Rb",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=11.54u",
                "source": "XRb out vss vss rppd w=0.5u l=11.54u",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "vss"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
                "displayName": "Rz",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=2.678u",
                "source": "XRz gate cz vss rppd w=0.5u l=2.678u",
                "pins": [
                  {
                    "id": "p",
                    "net": "gate"
                  },
                  {
                    "id": "n",
                    "net": "cz"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
                "spiceType": "X",
                "model": "cap_cmim",
                "parametersOrValue": "w=29.761u l=29.761u m=15",
                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "IHP MIM model terminal order"
              }
            ],
            "nets": [
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "d"
                  },
                  {
                    "device": "XMB",
                    "pin": "g"
                  },
                  {
                    "device": "XMT",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ib"
                ],
                "voltageReferences": []
              },
              {
                "id": "vss",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "s"
                  },
                  {
                    "device": "XMB",
                    "pin": "b"
                  },
                  {
                    "device": "XMT",
                    "pin": "s"
                  },
                  {
                    "device": "XMT",
                    "pin": "b"
                  },
                  {
                    "device": "XM1",
                    "pin": "b"
                  },
                  {
                    "device": "XM2",
                    "pin": "b"
                  },
                  {
                    "device": "XRb",
                    "pin": "n"
                  },
                  {
                    "device": "XRb",
                    "pin": "substrate"
                  },
                  {
                    "device": "XRz",
                    "pin": "substrate"
                  }
                ],
                "ports": [
                  "vss"
                ],
                "voltageReferences": []
              },
              {
                "id": "tail",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMT",
                    "pin": "d"
                  },
                  {
                    "device": "XM1",
                    "pin": "s"
                  },
                  {
                    "device": "XM2",
                    "pin": "s"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "g"
                  },
                  {
                    "device": "XM4",
                    "pin": "g"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "sense"
                ],
                "voltageReferences": []
              },
              {
                "id": "gate",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "d"
                  },
                  {
                    "device": "XM4",
                    "pin": "d"
                  },
                  {
                    "device": "XMP",
                    "pin": "g"
                  },
                  {
                    "device": "XRz",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ref"
                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM3",
                    "pin": "s"
                  },
                  {
                    "device": "XM3",
                    "pin": "b"
                  },
                  {
                    "device": "XM4",
                    "pin": "s"
                  },
                  {
                    "device": "XM4",
                    "pin": "b"
                  },
                  {
                    "device": "XMP",
                    "pin": "s"
                  },
                  {
                    "device": "XMP",
                    "pin": "b"
                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMP",
                    "pin": "d"
                  },
                  {
                    "device": "XRb",
                    "pin": "p"
                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
                "terminals": [
                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ]
      },
      {
        "id": "graph-5",
        "kind": "electrical-connectivity",
        "boundary": "Device pins and net incidence from the generated SPICE deck, including ideal bench elements. PDK/model internals are referenced, not expanded. This is not layout, extraction, DRC/LVS or silicon evidence.",
        "root": "top",
        "globalDefinitions": [],
        "scopes": [
          {
            "id": "top",
            "name": "top",
            "ports": [],
            "definitions": [],
            "devices": [
              {
                "id": "Vdd",
                "displayName": "Vdd",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 3.3",
                "source": "Vdd vdd 0 dc 3.3",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vref",
                "displayName": "Vref",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 1.2",
                "source": "Vref ref 0 dc 1.2",
                "pins": [
                  {
                    "id": "p",
                    "net": "ref"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Ib",
                "displayName": "Ib",
                "spiceType": "I",
                "model": null,
                "parametersOrValue": "dc 5u",
                "source": "Ib vdd ib dc 5u",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Xdut",
                "displayName": "Xdut",
                "spiceType": "X",
                "model": "ldo5thv",
                "parametersOrValue": "",
                "source": "Xdut ref sense out vdd 0 ib ldo5thv",
                "pins": [
                  {
                    "id": "ref",
                    "net": "ref"
                  },
                  {
                    "id": "sense",
                    "net": "sense"
                  },
                  {
                    "id": "out",
                    "net": "out"
                  },
                  {
                    "id": "vdd",
                    "net": "vdd"
                  },
                  {
                    "id": "vss",
                    "net": "0"
                  },
                  {
                    "id": "ib",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "Declared .subckt port order",
                "subcircuit": "subckt/ldo5thv"
              },
              {
                "id": "Vsense",
                "displayName": "Vsense",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "0",
                "source": "Vsense sense out 0",
                "pins": [
                  {
                    "id": "p",
                    "net": "sense"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Cl",
                "displayName": "Cl",
                "spiceType": "C",
                "model": null,
                "parametersOrValue": "100p",
                "source": "Cl out 0 100p",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vload",
                "displayName": "Vload",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 0",
                "source": "Vload il 0 dc 0",
                "pins": [
                  {
                    "id": "p",
                    "net": "il"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Bload",
                "displayName": "Bload",
                "spiceType": "B",
                "model": null,
                "parametersOrValue": "i=v(il)*min(1, max(v(out), 0)/0.05)",
                "source": "Bload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order",
                "expressionDependencies": {
                  "voltageNets": [
                    "il",
                    "out"
                  ],
                  "currentDevices": []
                }
              }
            ],
            "nets": [
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "p"
                  },
                  {
                    "device": "Ib",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vdd"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "0",
                "ground": true,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "n"
                  },
                  {
                    "device": "Vref",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vss"
                  },
                  {
                    "device": "Cl",
                    "pin": "n"
                  },
                  {
                    "device": "Vload",
                    "pin": "n"
                  },
                  {
                    "device": "Bload",
                    "pin": "n"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vref",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ref"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "Ib",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ib"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "sense"
                  },
                  {
                    "device": "Vsense",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "out"
                  },
                  {
                    "device": "Vsense",
                    "pin": "n"
                  },
                  {
                    "device": "Cl",
                    "pin": "p"
                  },
                  {
                    "device": "Bload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              },
              {
                "id": "il",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              }
            ]
          },
          {
            "id": "subckt/ldo5thv",
            "name": "ldo5thv",
            "ports": [
              {
                "name": "ref",
                "net": "ref"
              },
              {
                "name": "sense",
                "net": "sense"
              },
              {
                "name": "out",
                "net": "out"
              },
              {
                "name": "vdd",
                "net": "vdd"
              },
              {
                "name": "vss",
                "net": "vss"
              },
              {
                "name": "ib",
                "net": "ib"
              }
            ],
            "definitions": [],
            "devices": [
              {
                "id": "XMB",
                "displayName": "MB",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=1",
                "source": "XMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "ib"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMT",
                "displayName": "MT",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=24",
                "source": "XMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24",
                "pins": [
                  {
                    "id": "d",
                    "net": "tail"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM1",
                "displayName": "M1",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "sense"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM2",
                "displayName": "M2",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "ref"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM3",
                "displayName": "M3",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM4",
                "displayName": "M4",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMP",
                "displayName": "MP",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=2.4m l=450n ng=480 m=1",
                "source": "XMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "out"
                  },
                  {
                    "id": "g",
                    "net": "gate"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XRb",
                "displayName": "Rb",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=11.54u",
                "source": "XRb out vss vss rppd w=0.5u l=11.54u",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "vss"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
                "displayName": "Rz",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=2.678u",
                "source": "XRz gate cz vss rppd w=0.5u l=2.678u",
                "pins": [
                  {
                    "id": "p",
                    "net": "gate"
                  },
                  {
                    "id": "n",
                    "net": "cz"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
                "spiceType": "X",
                "model": "cap_cmim",
                "parametersOrValue": "w=29.761u l=29.761u m=15",
                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "IHP MIM model terminal order"
              }
            ],
            "nets": [
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "d"
                  },
                  {
                    "device": "XMB",
                    "pin": "g"
                  },
                  {
                    "device": "XMT",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ib"
                ],
                "voltageReferences": []
              },
              {
                "id": "vss",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "s"
                  },
                  {
                    "device": "XMB",
                    "pin": "b"
                  },
                  {
                    "device": "XMT",
                    "pin": "s"
                  },
                  {
                    "device": "XMT",
                    "pin": "b"
                  },
                  {
                    "device": "XM1",
                    "pin": "b"
                  },
                  {
                    "device": "XM2",
                    "pin": "b"
                  },
                  {
                    "device": "XRb",
                    "pin": "n"
                  },
                  {
                    "device": "XRb",
                    "pin": "substrate"
                  },
                  {
                    "device": "XRz",
                    "pin": "substrate"
                  }
                ],
                "ports": [
                  "vss"
                ],
                "voltageReferences": []
              },
              {
                "id": "tail",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMT",
                    "pin": "d"
                  },
                  {
                    "device": "XM1",
                    "pin": "s"
                  },
                  {
                    "device": "XM2",
                    "pin": "s"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "g"
                  },
                  {
                    "device": "XM4",
                    "pin": "g"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "sense"
                ],
                "voltageReferences": []
              },
              {
                "id": "gate",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "d"
                  },
                  {
                    "device": "XM4",
                    "pin": "d"
                  },
                  {
                    "device": "XMP",
                    "pin": "g"
                  },
                  {
                    "device": "XRz",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ref"
                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM3",
                    "pin": "s"
                  },
                  {
                    "device": "XM3",
                    "pin": "b"
                  },
                  {
                    "device": "XM4",
                    "pin": "s"
                  },
                  {
                    "device": "XM4",
                    "pin": "b"
                  },
                  {
                    "device": "XMP",
                    "pin": "s"
                  },
                  {
                    "device": "XMP",
                    "pin": "b"
                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMP",
                    "pin": "d"
                  },
                  {
                    "device": "XRb",
                    "pin": "p"
                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
                "terminals": [
                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ],
        "uninstantiatedDefinitions": [],
        "dut": {
          "kind": "subcircuit-instance",
          "scope": "top",
          "device": "Xdut",
          "definition": "subckt/ldo5thv"
        }
      },
      {
        "id": "graph-6",
        "kind": "electrical-connectivity",
        "boundary": "Device pins and net incidence from the generated SPICE deck, including ideal bench elements. PDK/model internals are referenced, not expanded. This is not layout, extraction, DRC/LVS or silicon evidence.",
        "root": "top",
        "globalDefinitions": [],
        "scopes": [
          {
            "id": "top",
            "name": "top",
            "ports": [],
            "definitions": [],
            "devices": [
              {
                "id": "Vdd",
                "displayName": "Vdd",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 3.3",
                "source": "Vdd vdd 0 dc 3.3",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vref",
                "displayName": "Vref",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 1.2",
                "source": "Vref ref 0 dc 1.2",
                "pins": [
                  {
                    "id": "p",
                    "net": "ref"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Ib",
                "displayName": "Ib",
                "spiceType": "I",
                "model": null,
                "parametersOrValue": "dc 5u",
                "source": "Ib vdd ib dc 5u",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Xdut",
                "displayName": "Xdut",
                "spiceType": "X",
                "model": "ldo5thv",
                "parametersOrValue": "",
                "source": "Xdut ref sense out vdd 0 ib ldo5thv",
                "pins": [
                  {
                    "id": "ref",
                    "net": "ref"
                  },
                  {
                    "id": "sense",
                    "net": "sense"
                  },
                  {
                    "id": "out",
                    "net": "out"
                  },
                  {
                    "id": "vdd",
                    "net": "vdd"
                  },
                  {
                    "id": "vss",
                    "net": "0"
                  },
                  {
                    "id": "ib",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "Declared .subckt port order",
                "subcircuit": "subckt/ldo5thv"
              },
              {
                "id": "Vsense",
                "displayName": "Vsense",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "0",
                "source": "Vsense sense out 0",
                "pins": [
                  {
                    "id": "p",
                    "net": "sense"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Cl",
                "displayName": "Cl",
                "spiceType": "C",
                "model": null,
                "parametersOrValue": "100p",
                "source": "Cl out 0 100p",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vload",
                "displayName": "Vload",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 10m",
                "source": "Vload il 0 dc 10m",
                "pins": [
                  {
                    "id": "p",
                    "net": "il"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Bload",
                "displayName": "Bload",
                "spiceType": "B",
                "model": null,
                "parametersOrValue": "i=v(il)*min(1, max(v(out), 0)/0.05)",
                "source": "Bload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order",
                "expressionDependencies": {
                  "voltageNets": [
                    "il",
                    "out"
                  ],
                  "currentDevices": []
                }
              }
            ],
            "nets": [
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "p"
                  },
                  {
                    "device": "Ib",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vdd"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "0",
                "ground": true,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "n"
                  },
                  {
                    "device": "Vref",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vss"
                  },
                  {
                    "device": "Cl",
                    "pin": "n"
                  },
                  {
                    "device": "Vload",
                    "pin": "n"
                  },
                  {
                    "device": "Bload",
                    "pin": "n"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vref",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ref"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "Ib",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ib"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "sense"
                  },
                  {
                    "device": "Vsense",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "out"
                  },
                  {
                    "device": "Vsense",
                    "pin": "n"
                  },
                  {
                    "device": "Cl",
                    "pin": "p"
                  },
                  {
                    "device": "Bload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              },
              {
                "id": "il",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              }
            ]
          },
          {
            "id": "subckt/ldo5thv",
            "name": "ldo5thv",
            "ports": [
              {
                "name": "ref",
                "net": "ref"
              },
              {
                "name": "sense",
                "net": "sense"
              },
              {
                "name": "out",
                "net": "out"
              },
              {
                "name": "vdd",
                "net": "vdd"
              },
              {
                "name": "vss",
                "net": "vss"
              },
              {
                "name": "ib",
                "net": "ib"
              }
            ],
            "definitions": [],
            "devices": [
              {
                "id": "XMB",
                "displayName": "MB",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=1",
                "source": "XMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "ib"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMT",
                "displayName": "MT",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=24",
                "source": "XMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24",
                "pins": [
                  {
                    "id": "d",
                    "net": "tail"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM1",
                "displayName": "M1",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "sense"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM2",
                "displayName": "M2",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "ref"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM3",
                "displayName": "M3",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM4",
                "displayName": "M4",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMP",
                "displayName": "MP",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=2.4m l=450n ng=480 m=1",
                "source": "XMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "out"
                  },
                  {
                    "id": "g",
                    "net": "gate"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XRb",
                "displayName": "Rb",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=11.54u",
                "source": "XRb out vss vss rppd w=0.5u l=11.54u",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "vss"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
                "displayName": "Rz",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=2.678u",
                "source": "XRz gate cz vss rppd w=0.5u l=2.678u",
                "pins": [
                  {
                    "id": "p",
                    "net": "gate"
                  },
                  {
                    "id": "n",
                    "net": "cz"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
                "spiceType": "X",
                "model": "cap_cmim",
                "parametersOrValue": "w=29.761u l=29.761u m=15",
                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "IHP MIM model terminal order"
              }
            ],
            "nets": [
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "d"
                  },
                  {
                    "device": "XMB",
                    "pin": "g"
                  },
                  {
                    "device": "XMT",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ib"
                ],
                "voltageReferences": []
              },
              {
                "id": "vss",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "s"
                  },
                  {
                    "device": "XMB",
                    "pin": "b"
                  },
                  {
                    "device": "XMT",
                    "pin": "s"
                  },
                  {
                    "device": "XMT",
                    "pin": "b"
                  },
                  {
                    "device": "XM1",
                    "pin": "b"
                  },
                  {
                    "device": "XM2",
                    "pin": "b"
                  },
                  {
                    "device": "XRb",
                    "pin": "n"
                  },
                  {
                    "device": "XRb",
                    "pin": "substrate"
                  },
                  {
                    "device": "XRz",
                    "pin": "substrate"
                  }
                ],
                "ports": [
                  "vss"
                ],
                "voltageReferences": []
              },
              {
                "id": "tail",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMT",
                    "pin": "d"
                  },
                  {
                    "device": "XM1",
                    "pin": "s"
                  },
                  {
                    "device": "XM2",
                    "pin": "s"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "g"
                  },
                  {
                    "device": "XM4",
                    "pin": "g"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "sense"
                ],
                "voltageReferences": []
              },
              {
                "id": "gate",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "d"
                  },
                  {
                    "device": "XM4",
                    "pin": "d"
                  },
                  {
                    "device": "XMP",
                    "pin": "g"
                  },
                  {
                    "device": "XRz",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ref"
                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM3",
                    "pin": "s"
                  },
                  {
                    "device": "XM3",
                    "pin": "b"
                  },
                  {
                    "device": "XM4",
                    "pin": "s"
                  },
                  {
                    "device": "XM4",
                    "pin": "b"
                  },
                  {
                    "device": "XMP",
                    "pin": "s"
                  },
                  {
                    "device": "XMP",
                    "pin": "b"
                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMP",
                    "pin": "d"
                  },
                  {
                    "device": "XRb",
                    "pin": "p"
                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
                "terminals": [
                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ],
        "uninstantiatedDefinitions": [],
        "dut": {
          "kind": "subcircuit-instance",
          "scope": "top",
          "device": "Xdut",
          "definition": "subckt/ldo5thv"
        }
      },
      {
        "id": "graph-7",
        "kind": "electrical-connectivity",
        "boundary": "Device pins and net incidence from the generated SPICE deck, including ideal bench elements. PDK/model internals are referenced, not expanded. This is not layout, extraction, DRC/LVS or silicon evidence.",
        "root": "top",
        "globalDefinitions": [
          ".param VDD=3.3"
        ],
        "scopes": [
          {
            "id": "top",
            "name": "top",
            "ports": [],
            "definitions": [
              ".param VDD=3.3"
            ],
            "devices": [
              {
                "id": "Vdd",
                "displayName": "Vdd",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc {VDD}",
                "source": "Vdd vdd 0 dc {VDD}",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vref",
                "displayName": "Vref",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 1.2",
                "source": "Vref ref 0 dc 1.2",
                "pins": [
                  {
                    "id": "p",
                    "net": "ref"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Ib",
                "displayName": "Ib",
                "spiceType": "I",
                "model": null,
                "parametersOrValue": "dc 5u",
                "source": "Ib vdd ib dc 5u",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Xdut",
                "displayName": "Xdut",
                "spiceType": "X",
                "model": "ldo5thv",
                "parametersOrValue": "",
                "source": "Xdut ref sense out vdd 0 ib ldo5thv",
                "pins": [
                  {
                    "id": "ref",
                    "net": "ref"
                  },
                  {
                    "id": "sense",
                    "net": "sense"
                  },
                  {
                    "id": "out",
                    "net": "out"
                  },
                  {
                    "id": "vdd",
                    "net": "vdd"
                  },
                  {
                    "id": "vss",
                    "net": "0"
                  },
                  {
                    "id": "ib",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "Declared .subckt port order",
                "subcircuit": "subckt/ldo5thv"
              },
              {
                "id": "Vinj",
                "displayName": "Vinj",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 0 ac 1",
                "source": "Vinj sense out dc 0 ac 1",
                "pins": [
                  {
                    "id": "p",
                    "net": "sense"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Cl",
                "displayName": "Cl",
                "spiceType": "C",
                "model": null,
                "parametersOrValue": "100p",
                "source": "Cl out 0 100p",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vload",
                "displayName": "Vload",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 10m",
                "source": "Vload il 0 dc 10m",
                "pins": [
                  {
                    "id": "p",
                    "net": "il"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Bload",
                "displayName": "Bload",
                "spiceType": "B",
                "model": null,
                "parametersOrValue": "i=v(il)*min(1, max(v(out), 0)/0.05)",
                "source": "Bload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order",
                "expressionDependencies": {
                  "voltageNets": [
                    "il",
                    "out"
                  ],
                  "currentDevices": []
                }
              }
            ],
            "nets": [
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "p"
                  },
                  {
                    "device": "Ib",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vdd"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "0",
                "ground": true,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "n"
                  },
                  {
                    "device": "Vref",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vss"
                  },
                  {
                    "device": "Cl",
                    "pin": "n"
                  },
                  {
                    "device": "Vload",
                    "pin": "n"
                  },
                  {
                    "device": "Bload",
                    "pin": "n"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vref",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ref"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "Ib",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ib"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "sense"
                  },
                  {
                    "device": "Vinj",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "out"
                  },
                  {
                    "device": "Vinj",
                    "pin": "n"
                  },
                  {
                    "device": "Cl",
                    "pin": "p"
                  },
                  {
                    "device": "Bload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              },
              {
                "id": "il",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              }
            ]
          },
          {
            "id": "subckt/ldo5thv",
            "name": "ldo5thv",
            "ports": [
              {
                "name": "ref",
                "net": "ref"
              },
              {
                "name": "sense",
                "net": "sense"
              },
              {
                "name": "out",
                "net": "out"
              },
              {
                "name": "vdd",
                "net": "vdd"
              },
              {
                "name": "vss",
                "net": "vss"
              },
              {
                "name": "ib",
                "net": "ib"
              }
            ],
            "definitions": [],
            "devices": [
              {
                "id": "XMB",
                "displayName": "MB",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=1",
                "source": "XMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "ib"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMT",
                "displayName": "MT",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=24",
                "source": "XMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24",
                "pins": [
                  {
                    "id": "d",
                    "net": "tail"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM1",
                "displayName": "M1",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "sense"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM2",
                "displayName": "M2",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "ref"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM3",
                "displayName": "M3",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM4",
                "displayName": "M4",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMP",
                "displayName": "MP",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=2.4m l=450n ng=480 m=1",
                "source": "XMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "out"
                  },
                  {
                    "id": "g",
                    "net": "gate"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XRb",
                "displayName": "Rb",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=11.54u",
                "source": "XRb out vss vss rppd w=0.5u l=11.54u",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "vss"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
                "displayName": "Rz",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=2.678u",
                "source": "XRz gate cz vss rppd w=0.5u l=2.678u",
                "pins": [
                  {
                    "id": "p",
                    "net": "gate"
                  },
                  {
                    "id": "n",
                    "net": "cz"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
                "spiceType": "X",
                "model": "cap_cmim",
                "parametersOrValue": "w=29.761u l=29.761u m=15",
                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "IHP MIM model terminal order"
              }
            ],
            "nets": [
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "d"
                  },
                  {
                    "device": "XMB",
                    "pin": "g"
                  },
                  {
                    "device": "XMT",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ib"
                ],
                "voltageReferences": []
              },
              {
                "id": "vss",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "s"
                  },
                  {
                    "device": "XMB",
                    "pin": "b"
                  },
                  {
                    "device": "XMT",
                    "pin": "s"
                  },
                  {
                    "device": "XMT",
                    "pin": "b"
                  },
                  {
                    "device": "XM1",
                    "pin": "b"
                  },
                  {
                    "device": "XM2",
                    "pin": "b"
                  },
                  {
                    "device": "XRb",
                    "pin": "n"
                  },
                  {
                    "device": "XRb",
                    "pin": "substrate"
                  },
                  {
                    "device": "XRz",
                    "pin": "substrate"
                  }
                ],
                "ports": [
                  "vss"
                ],
                "voltageReferences": []
              },
              {
                "id": "tail",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMT",
                    "pin": "d"
                  },
                  {
                    "device": "XM1",
                    "pin": "s"
                  },
                  {
                    "device": "XM2",
                    "pin": "s"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "g"
                  },
                  {
                    "device": "XM4",
                    "pin": "g"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "sense"
                ],
                "voltageReferences": []
              },
              {
                "id": "gate",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "d"
                  },
                  {
                    "device": "XM4",
                    "pin": "d"
                  },
                  {
                    "device": "XMP",
                    "pin": "g"
                  },
                  {
                    "device": "XRz",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ref"
                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM3",
                    "pin": "s"
                  },
                  {
                    "device": "XM3",
                    "pin": "b"
                  },
                  {
                    "device": "XM4",
                    "pin": "s"
                  },
                  {
                    "device": "XM4",
                    "pin": "b"
                  },
                  {
                    "device": "XMP",
                    "pin": "s"
                  },
                  {
                    "device": "XMP",
                    "pin": "b"
                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMP",
                    "pin": "d"
                  },
                  {
                    "device": "XRb",
                    "pin": "p"
                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
                "terminals": [
                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ],
        "uninstantiatedDefinitions": [],
        "dut": {
          "kind": "subcircuit-instance",
          "scope": "top",
          "device": "Xdut",
          "definition": "subckt/ldo5thv"
        }
      },
      {
        "id": "graph-8",
        "kind": "electrical-connectivity",
        "boundary": "Device pins and net incidence from the generated SPICE deck, including ideal bench elements. PDK/model internals are referenced, not expanded. This is not layout, extraction, DRC/LVS or silicon evidence.",
        "root": "top",
        "globalDefinitions": [
          ".param VDD=3.3"
        ],
        "scopes": [
          {
            "id": "top",
            "name": "top",
            "ports": [],
            "definitions": [
              ".param VDD=3.3"
            ],
            "devices": [
              {
                "id": "Vdd",
                "displayName": "Vdd",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc {VDD}",
                "source": "Vdd vdd 0 dc {VDD}",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vref",
                "displayName": "Vref",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 1.2",
                "source": "Vref ref 0 dc 1.2",
                "pins": [
                  {
                    "id": "p",
                    "net": "ref"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Ib",
                "displayName": "Ib",
                "spiceType": "I",
                "model": null,
                "parametersOrValue": "dc 5u",
                "source": "Ib vdd ib dc 5u",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Xdut",
                "displayName": "Xdut",
                "spiceType": "X",
                "model": "ldo5thv",
                "parametersOrValue": "",
                "source": "Xdut ref sense out vdd 0 ib ldo5thv",
                "pins": [
                  {
                    "id": "ref",
                    "net": "ref"
                  },
                  {
                    "id": "sense",
                    "net": "sense"
                  },
                  {
                    "id": "out",
                    "net": "out"
                  },
                  {
                    "id": "vdd",
                    "net": "vdd"
                  },
                  {
                    "id": "vss",
                    "net": "0"
                  },
                  {
                    "id": "ib",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "Declared .subckt port order",
                "subcircuit": "subckt/ldo5thv"
              },
              {
                "id": "Vsense",
                "displayName": "Vsense",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "0",
                "source": "Vsense sense out 0",
                "pins": [
                  {
                    "id": "p",
                    "net": "sense"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Cl",
                "displayName": "Cl",
                "spiceType": "C",
                "model": null,
                "parametersOrValue": "100p",
                "source": "Cl out 0 100p",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vload",
                "displayName": "Vload",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "pwl(0 0 8u 0 8.4u 40u 20u 40u 20.4u 10u 28u 10u 28.4u 50u 40u 50u 40.4u 100u 48u 100u 48.4u 140u 60u 140u 60.4u 1m 68u 1m 68.4u 1.1m 80u 1.1m 80.4u 10m 88u 10m 88.4u 11m 100u 11m)",
                "source": "Vload il 0 pwl(0 0 8u 0 8.4u 40u 20u 40u 20.4u 10u 28u 10u 28.4u 50u 40u 50u 40.4u 100u 48u 100u 48.4u 140u 60u 140u 60.4u 1m 68u 1m 68.4u 1.1m 80u 1.1m 80.4u 10m 88u 10m 88.4u 11m 100u 11m)",
                "pins": [
                  {
                    "id": "p",
                    "net": "il"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Bload",
                "displayName": "Bload",
                "spiceType": "B",
                "model": null,
                "parametersOrValue": "i=v(il)*min(1, max(v(out), 0)/0.05)",
                "source": "Bload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order",
                "expressionDependencies": {
                  "voltageNets": [
                    "il",
                    "out"
                  ],
                  "currentDevices": []
                }
              }
            ],
            "nets": [
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "p"
                  },
                  {
                    "device": "Ib",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vdd"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "0",
                "ground": true,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "n"
                  },
                  {
                    "device": "Vref",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vss"
                  },
                  {
                    "device": "Cl",
                    "pin": "n"
                  },
                  {
                    "device": "Vload",
                    "pin": "n"
                  },
                  {
                    "device": "Bload",
                    "pin": "n"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vref",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ref"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "Ib",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ib"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "sense"
                  },
                  {
                    "device": "Vsense",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "out"
                  },
                  {
                    "device": "Vsense",
                    "pin": "n"
                  },
                  {
                    "device": "Cl",
                    "pin": "p"
                  },
                  {
                    "device": "Bload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              },
              {
                "id": "il",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              }
            ]
          },
          {
            "id": "subckt/ldo5thv",
            "name": "ldo5thv",
            "ports": [
              {
                "name": "ref",
                "net": "ref"
              },
              {
                "name": "sense",
                "net": "sense"
              },
              {
                "name": "out",
                "net": "out"
              },
              {
                "name": "vdd",
                "net": "vdd"
              },
              {
                "name": "vss",
                "net": "vss"
              },
              {
                "name": "ib",
                "net": "ib"
              }
            ],
            "definitions": [],
            "devices": [
              {
                "id": "XMB",
                "displayName": "MB",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=1",
                "source": "XMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "ib"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMT",
                "displayName": "MT",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=24",
                "source": "XMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24",
                "pins": [
                  {
                    "id": "d",
                    "net": "tail"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM1",
                "displayName": "M1",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "sense"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM2",
                "displayName": "M2",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "ref"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM3",
                "displayName": "M3",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM4",
                "displayName": "M4",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMP",
                "displayName": "MP",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=2.4m l=450n ng=480 m=1",
                "source": "XMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "out"
                  },
                  {
                    "id": "g",
                    "net": "gate"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XRb",
                "displayName": "Rb",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=11.54u",
                "source": "XRb out vss vss rppd w=0.5u l=11.54u",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "vss"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
                "displayName": "Rz",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=2.678u",
                "source": "XRz gate cz vss rppd w=0.5u l=2.678u",
                "pins": [
                  {
                    "id": "p",
                    "net": "gate"
                  },
                  {
                    "id": "n",
                    "net": "cz"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
                "spiceType": "X",
                "model": "cap_cmim",
                "parametersOrValue": "w=29.761u l=29.761u m=15",
                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "IHP MIM model terminal order"
              }
            ],
            "nets": [
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "d"
                  },
                  {
                    "device": "XMB",
                    "pin": "g"
                  },
                  {
                    "device": "XMT",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ib"
                ],
                "voltageReferences": []
              },
              {
                "id": "vss",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "s"
                  },
                  {
                    "device": "XMB",
                    "pin": "b"
                  },
                  {
                    "device": "XMT",
                    "pin": "s"
                  },
                  {
                    "device": "XMT",
                    "pin": "b"
                  },
                  {
                    "device": "XM1",
                    "pin": "b"
                  },
                  {
                    "device": "XM2",
                    "pin": "b"
                  },
                  {
                    "device": "XRb",
                    "pin": "n"
                  },
                  {
                    "device": "XRb",
                    "pin": "substrate"
                  },
                  {
                    "device": "XRz",
                    "pin": "substrate"
                  }
                ],
                "ports": [
                  "vss"
                ],
                "voltageReferences": []
              },
              {
                "id": "tail",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMT",
                    "pin": "d"
                  },
                  {
                    "device": "XM1",
                    "pin": "s"
                  },
                  {
                    "device": "XM2",
                    "pin": "s"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "g"
                  },
                  {
                    "device": "XM4",
                    "pin": "g"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
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                    "device": "XM1",
                    "pin": "g"
                  }
                ],
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                ],
                "voltageReferences": []
              },
              {
                "id": "gate",
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                  },
                  {
                    "device": "XM4",
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                  },
                  {
                    "device": "XMP",
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                    "device": "XRz",
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                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
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                    "pin": "g"
                  }
                ],
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                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
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                    "device": "XM3",
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                  },
                  {
                    "device": "XM3",
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                  },
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                    "device": "XMP",
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                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
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                "id": "out",
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                  {
                    "device": "XMP",
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                  {
                    "device": "XRb",
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                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
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                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ],
        "uninstantiatedDefinitions": [],
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          "kind": "subcircuit-instance",
          "scope": "top",
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      },
      {
        "id": "graph-9",
        "kind": "electrical-connectivity",
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        "root": "top",
        "globalDefinitions": [
          ".param VDD=3.3"
        ],
        "scopes": [
          {
            "id": "top",
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                    "net": "vdd"
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                  {
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              },
              {
                "id": "Vref",
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                    "net": "ref"
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                  {
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                    "net": "0"
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                ],
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              {
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                "model": null,
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                    "net": "vdd"
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                    "net": "ib"
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                  {
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              },
              {
                "id": "Cl",
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                    "id": "p",
                    "net": "out"
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                  {
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                    "net": "0"
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                ],
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              },
              {
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                  {
                    "id": "n",
                    "net": "0"
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                "source": "Bload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)",
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                    "net": "out"
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                  {
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                ],
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              }
            ],
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                "id": "vdd",
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                  {
                    "device": "Ib",
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                  {
                    "device": "Xdut",
                    "pin": "vdd"
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                ],
                "ports": [],
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              },
              {
                "id": "0",
                "ground": true,
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                  {
                    "device": "Vdd",
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                  },
                  {
                    "device": "Vref",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vss"
                  },
                  {
                    "device": "Cl",
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                  },
                  {
                    "device": "Vload",
                    "pin": "n"
                  },
                  {
                    "device": "Bload",
                    "pin": "n"
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                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
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                    "pin": "p"
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                  {
                    "device": "Xdut",
                    "pin": "ref"
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                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ib",
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                  {
                    "device": "Ib",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ib"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
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                  {
                    "device": "Xdut",
                    "pin": "sense"
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                  {
                    "device": "Vsense",
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                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "out",
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                  {
                    "device": "Xdut",
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                  {
                    "device": "Vsense",
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                  {
                    "device": "Cl",
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                  {
                    "device": "Bload",
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                ],
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                ]
              },
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                    "device": "Vload",
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                ],
                "ports": [],
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                ]
              }
            ]
          },
          {
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                "net": "ref"
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              {
                "name": "sense",
                "net": "sense"
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              {
                "name": "out",
                "net": "out"
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              {
                "name": "vdd",
                "net": "vdd"
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                "name": "vss",
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                    "id": "d",
                    "net": "ib"
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                  {
                    "id": "g",
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                    "net": "tail"
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                  {
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                  {
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                  {
                    "id": "g",
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                    "net": "vss"
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                  {
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                    "id": "s",
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                  {
                    "id": "b",
                    "net": "vdd"
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                  {
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                    "net": "gate"
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                  {
                    "id": "g",
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                  {
                    "id": "s",
                    "net": "vdd"
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                  {
                    "id": "b",
                    "net": "vdd"
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                    "net": "out"
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                  {
                    "id": "g",
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                  {
                    "id": "s",
                    "net": "vdd"
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                  {
                    "id": "b",
                    "net": "vdd"
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                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
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              {
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                  {
                    "id": "p",
                    "net": "out"
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                  {
                    "id": "n",
                    "net": "vss"
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                  {
                    "id": "substrate",
                    "net": "vss"
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                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
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                  {
                    "id": "p",
                    "net": "gate"
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                  {
                    "id": "n",
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                  {
                    "id": "substrate",
                    "net": "vss"
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                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
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                "model": "cap_cmim",
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                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
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                  {
                    "id": "n",
                    "net": "out"
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                ],
                "pinMeaning": "IHP MIM model terminal order"
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            ],
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                    "device": "XMB",
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                  {
                    "device": "XMB",
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                  {
                    "device": "XMT",
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                ],
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                "voltageReferences": []
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              {
                "id": "vss",
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                  {
                    "device": "XMB",
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                  {
                    "device": "XMT",
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                  {
                    "device": "XMT",
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                  {
                    "device": "XM1",
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                  {
                    "device": "XM2",
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                  },
                  {
                    "device": "XRb",
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                  {
                    "device": "XRb",
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                  {
                    "device": "XRz",
                    "pin": "substrate"
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                ],
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                "voltageReferences": []
              },
              {
                "id": "tail",
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                  {
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                  {
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                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
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                  {
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                  {
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                  {
                    "device": "XM4",
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                ],
                "ports": [],
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              },
              {
                "id": "sense",
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                ],
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                "voltageReferences": []
              },
              {
                "id": "gate",
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                  {
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                  {
                    "device": "XMP",
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                  {
                    "device": "XRz",
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                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
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                  {
                    "device": "XM2",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ref"
                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
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                  {
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                  {
                    "device": "XM4",
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                  {
                    "device": "XM4",
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                  },
                  {
                    "device": "XMP",
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                  {
                    "device": "XMP",
                    "pin": "b"
                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
              {
                "id": "out",
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                "terminals": [
                  {
                    "device": "XMP",
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                  {
                    "device": "XRb",
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                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
                "terminals": [
                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ],
        "uninstantiatedDefinitions": [],
        "dut": {
          "kind": "subcircuit-instance",
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        }
      },
      {
        "id": "graph-10",
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        "root": "top",
        "globalDefinitions": [
          ".param VDD=3.3"
        ],
        "scopes": [
          {
            "id": "top",
            "name": "top",
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            "definitions": [
              ".param VDD=3.3"
            ],
            "devices": [
              {
                "id": "Vdd",
                "displayName": "Vdd",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc {VDD}",
                "source": "Vdd vdd 0 dc {VDD}",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vref",
                "displayName": "Vref",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 1.2",
                "source": "Vref ref 0 dc 1.2",
                "pins": [
                  {
                    "id": "p",
                    "net": "ref"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Ib",
                "displayName": "Ib",
                "spiceType": "I",
                "model": null,
                "parametersOrValue": "dc 5u",
                "source": "Ib vdd ib dc 5u",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Xdut",
                "displayName": "Xdut",
                "spiceType": "X",
                "model": "ldo5thv",
                "parametersOrValue": "",
                "source": "Xdut ref sense out vdd 0 ib ldo5thv",
                "pins": [
                  {
                    "id": "ref",
                    "net": "ref"
                  },
                  {
                    "id": "sense",
                    "net": "sense"
                  },
                  {
                    "id": "out",
                    "net": "out"
                  },
                  {
                    "id": "vdd",
                    "net": "vdd"
                  },
                  {
                    "id": "vss",
                    "net": "0"
                  },
                  {
                    "id": "ib",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "Declared .subckt port order",
                "subcircuit": "subckt/ldo5thv"
              },
              {
                "id": "Vsense",
                "displayName": "Vsense",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "0",
                "source": "Vsense sense out 0",
                "pins": [
                  {
                    "id": "p",
                    "net": "sense"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Cl",
                "displayName": "Cl",
                "spiceType": "C",
                "model": null,
                "parametersOrValue": "100p",
                "source": "Cl out 0 100p",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vload",
                "displayName": "Vload",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "pulse(0 10m 4u 1u 1u 17u 80u)",
                "source": "Vload il 0 pulse(0 10m 4u 1u 1u 17u 80u)",
                "pins": [
                  {
                    "id": "p",
                    "net": "il"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Bload",
                "displayName": "Bload",
                "spiceType": "B",
                "model": null,
                "parametersOrValue": "i=v(il)*min(1, max(v(out), 0)/0.05)",
                "source": "Bload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order",
                "expressionDependencies": {
                  "voltageNets": [
                    "il",
                    "out"
                  ],
                  "currentDevices": []
                }
              }
            ],
            "nets": [
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "p"
                  },
                  {
                    "device": "Ib",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vdd"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "0",
                "ground": true,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "n"
                  },
                  {
                    "device": "Vref",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "vss"
                  },
                  {
                    "device": "Cl",
                    "pin": "n"
                  },
                  {
                    "device": "Vload",
                    "pin": "n"
                  },
                  {
                    "device": "Bload",
                    "pin": "n"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vref",
                    "pin": "p"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ref"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "Ib",
                    "pin": "n"
                  },
                  {
                    "device": "Xdut",
                    "pin": "ib"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "sense"
                  },
                  {
                    "device": "Vsense",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "Xdut",
                    "pin": "out"
                  },
                  {
                    "device": "Vsense",
                    "pin": "n"
                  },
                  {
                    "device": "Cl",
                    "pin": "p"
                  },
                  {
                    "device": "Bload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              },
              {
                "id": "il",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vload",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": [
                  "Bload"
                ]
              }
            ]
          },
          {
            "id": "subckt/ldo5thv",
            "name": "ldo5thv",
            "ports": [
              {
                "name": "ref",
                "net": "ref"
              },
              {
                "name": "sense",
                "net": "sense"
              },
              {
                "name": "out",
                "net": "out"
              },
              {
                "name": "vdd",
                "net": "vdd"
              },
              {
                "name": "vss",
                "net": "vss"
              },
              {
                "name": "ib",
                "net": "ib"
              }
            ],
            "definitions": [],
            "devices": [
              {
                "id": "XMB",
                "displayName": "MB",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=1",
                "source": "XMB ib ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "ib"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMT",
                "displayName": "MT",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=8u l=1u ng=2 m=24",
                "source": "XMT tail ib vss vss sg13_hv_nmos w=8u l=1u ng=2 m=24",
                "pins": [
                  {
                    "id": "d",
                    "net": "tail"
                  },
                  {
                    "id": "g",
                    "net": "ib"
                  },
                  {
                    "id": "s",
                    "net": "vss"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM1",
                "displayName": "M1",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM1 d1 sense tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "sense"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM2",
                "displayName": "M2",
                "spiceType": "X",
                "model": "sg13_hv_nmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM2 gate ref tail vss sg13_hv_nmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "ref"
                  },
                  {
                    "id": "s",
                    "net": "tail"
                  },
                  {
                    "id": "b",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM3",
                "displayName": "M3",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM3 d1 d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "d1"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XM4",
                "displayName": "M4",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=40u l=2u ng=8 m=1",
                "source": "XM4 gate d1 vdd vdd sg13_hv_pmos w=40u l=2u ng=8 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "gate"
                  },
                  {
                    "id": "g",
                    "net": "d1"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XMP",
                "displayName": "MP",
                "spiceType": "X",
                "model": "sg13_hv_pmos",
                "parametersOrValue": "w=2.4m l=450n ng=480 m=1",
                "source": "XMP out gate vdd vdd sg13_hv_pmos w=2.4m l=450n ng=480 m=1",
                "pins": [
                  {
                    "id": "d",
                    "net": "out"
                  },
                  {
                    "id": "g",
                    "net": "gate"
                  },
                  {
                    "id": "s",
                    "net": "vdd"
                  },
                  {
                    "id": "b",
                    "net": "vdd"
                  }
                ],
                "pinMeaning": "MOS drain, gate, source, bulk"
              },
              {
                "id": "XRb",
                "displayName": "Rb",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=11.54u",
                "source": "XRb out vss vss rppd w=0.5u l=11.54u",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "vss"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XRz",
                "displayName": "Rz",
                "spiceType": "X",
                "model": "rppd",
                "parametersOrValue": "w=0.5u l=2.678u",
                "source": "XRz gate cz vss rppd w=0.5u l=2.678u",
                "pins": [
                  {
                    "id": "p",
                    "net": "gate"
                  },
                  {
                    "id": "n",
                    "net": "cz"
                  },
                  {
                    "id": "substrate",
                    "net": "vss"
                  }
                ],
                "pinMeaning": "IHP resistor model terminal order"
              },
              {
                "id": "XCc",
                "displayName": "Cc",
                "spiceType": "X",
                "model": "cap_cmim",
                "parametersOrValue": "w=29.761u l=29.761u m=15",
                "source": "XCc cz out cap_cmim w=29.761u l=29.761u m=15",
                "pins": [
                  {
                    "id": "p",
                    "net": "cz"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "IHP MIM model terminal order"
              }
            ],
            "nets": [
              {
                "id": "ib",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "d"
                  },
                  {
                    "device": "XMB",
                    "pin": "g"
                  },
                  {
                    "device": "XMT",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ib"
                ],
                "voltageReferences": []
              },
              {
                "id": "vss",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMB",
                    "pin": "s"
                  },
                  {
                    "device": "XMB",
                    "pin": "b"
                  },
                  {
                    "device": "XMT",
                    "pin": "s"
                  },
                  {
                    "device": "XMT",
                    "pin": "b"
                  },
                  {
                    "device": "XM1",
                    "pin": "b"
                  },
                  {
                    "device": "XM2",
                    "pin": "b"
                  },
                  {
                    "device": "XRb",
                    "pin": "n"
                  },
                  {
                    "device": "XRb",
                    "pin": "substrate"
                  },
                  {
                    "device": "XRz",
                    "pin": "substrate"
                  }
                ],
                "ports": [
                  "vss"
                ],
                "voltageReferences": []
              },
              {
                "id": "tail",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMT",
                    "pin": "d"
                  },
                  {
                    "device": "XM1",
                    "pin": "s"
                  },
                  {
                    "device": "XM2",
                    "pin": "s"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "d1",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "d"
                  },
                  {
                    "device": "XM3",
                    "pin": "g"
                  },
                  {
                    "device": "XM4",
                    "pin": "g"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "sense",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM1",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "sense"
                ],
                "voltageReferences": []
              },
              {
                "id": "gate",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "d"
                  },
                  {
                    "device": "XM4",
                    "pin": "d"
                  },
                  {
                    "device": "XMP",
                    "pin": "g"
                  },
                  {
                    "device": "XRz",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              },
              {
                "id": "ref",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM2",
                    "pin": "g"
                  }
                ],
                "ports": [
                  "ref"
                ],
                "voltageReferences": []
              },
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "XM3",
                    "pin": "s"
                  },
                  {
                    "device": "XM3",
                    "pin": "b"
                  },
                  {
                    "device": "XM4",
                    "pin": "s"
                  },
                  {
                    "device": "XM4",
                    "pin": "b"
                  },
                  {
                    "device": "XMP",
                    "pin": "s"
                  },
                  {
                    "device": "XMP",
                    "pin": "b"
                  }
                ],
                "ports": [
                  "vdd"
                ],
                "voltageReferences": []
              },
              {
                "id": "out",
                "ground": false,
                "terminals": [
                  {
                    "device": "XMP",
                    "pin": "d"
                  },
                  {
                    "device": "XRb",
                    "pin": "p"
                  },
                  {
                    "device": "XCc",
                    "pin": "n"
                  }
                ],
                "ports": [
                  "out"
                ],
                "voltageReferences": []
              },
              {
                "id": "cz",
                "ground": false,
                "terminals": [
                  {
                    "device": "XRz",
                    "pin": "n"
                  },
                  {
                    "device": "XCc",
                    "pin": "p"
                  }
                ],
                "ports": [],
                "voltageReferences": []
              }
            ]
          }
        ],
        "uninstantiatedDefinitions": [],
        "dut": {
          "kind": "subcircuit-instance",
          "scope": "top",
          "device": "Xdut",
          "definition": "subckt/ldo5thv"
        }
      },
      {
        "id": "graph-11",
        "kind": "electrical-connectivity",
        "boundary": "Device pins and net incidence from the generated SPICE deck, including ideal bench elements. PDK/model internals are referenced, not expanded. This is not layout, extraction, DRC/LVS or silicon evidence.",
        "root": "top",
        "globalDefinitions": [],
        "scopes": [
          {
            "id": "top",
            "name": "top",
            "ports": [],
            "definitions": [],
            "devices": [
              {
                "id": "Vdd",
                "displayName": "Vdd",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "pulse(2.97 3.63 4u 1u 1u 17u 80u)",
                "source": "Vdd vdd 0 pulse(2.97 3.63 4u 1u 1u 17u 80u)",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vref",
                "displayName": "Vref",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 1.2",
                "source": "Vref ref 0 dc 1.2",
                "pins": [
                  {
                    "id": "p",
                    "net": "ref"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Ib",
                "displayName": "Ib",
                "spiceType": "I",
                "model": null,
                "parametersOrValue": "dc 5u",
                "source": "Ib vdd ib dc 5u",
                "pins": [
                  {
                    "id": "p",
                    "net": "vdd"
                  },
                  {
                    "id": "n",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Xdut",
                "displayName": "Xdut",
                "spiceType": "X",
                "model": "ldo5thv",
                "parametersOrValue": "",
                "source": "Xdut ref sense out vdd 0 ib ldo5thv",
                "pins": [
                  {
                    "id": "ref",
                    "net": "ref"
                  },
                  {
                    "id": "sense",
                    "net": "sense"
                  },
                  {
                    "id": "out",
                    "net": "out"
                  },
                  {
                    "id": "vdd",
                    "net": "vdd"
                  },
                  {
                    "id": "vss",
                    "net": "0"
                  },
                  {
                    "id": "ib",
                    "net": "ib"
                  }
                ],
                "pinMeaning": "Declared .subckt port order",
                "subcircuit": "subckt/ldo5thv"
              },
              {
                "id": "Vsense",
                "displayName": "Vsense",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "0",
                "source": "Vsense sense out 0",
                "pins": [
                  {
                    "id": "p",
                    "net": "sense"
                  },
                  {
                    "id": "n",
                    "net": "out"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Cl",
                "displayName": "Cl",
                "spiceType": "C",
                "model": null,
                "parametersOrValue": "100p",
                "source": "Cl out 0 100p",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Vload",
                "displayName": "Vload",
                "spiceType": "V",
                "model": null,
                "parametersOrValue": "dc 10m",
                "source": "Vload il 0 dc 10m",
                "pins": [
                  {
                    "id": "p",
                    "net": "il"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order"
              },
              {
                "id": "Bload",
                "displayName": "Bload",
                "spiceType": "B",
                "model": null,
                "parametersOrValue": "i=v(il)*min(1, max(v(out), 0)/0.05)",
                "source": "Bload out 0 i=v(il)*min(1, max(v(out), 0)/0.05)",
                "pins": [
                  {
                    "id": "p",
                    "net": "out"
                  },
                  {
                    "id": "n",
                    "net": "0"
                  }
                ],
                "pinMeaning": "SPICE primitive terminal order",
                "expressionDependencies": {
                  "voltageNets": [
                    "il",
                    "out"
                  ],
                  "currentDevices": []
                }
              }
            ],
            "nets": [
              {
                "id": "vdd",
                "ground": false,
                "terminals": [
                  {
                    "device": "Vdd",
                    "pin": "p"
                  },
                  {
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