Three-stage op amp, local impedance attenuation

How it works

A three-stage op amp compensated through the first stage's cascode - cascode Miller compensation - with a series RC on the second stage's output that attenuates that node's impedance at high frequency only. The loop the cascode Miller capacitor closes around the last two stages leaves a complex pole pair; the attenuation stops the second stage from adding phase to that loop, and the pair is damped, while the DC gain keeps o2's full resistance.

The testbench draws Ib (2.5 µA) out of MB. MT is one copy, so each input device carries half an Ib; the sinks are two copies of M21, leaving 1.5 Ib for each cascode; Rb lifts the cascode gate above vbn. M12 is one copy of MB, so the second stage runs at Ib, and M14, sixteen copies of M9, gives the output 40 µA. The input pair is 2 µm long, the PMOS source unit 6 µm and the NMOS sink unit 8 µm, keeping the same current densities with more matching area.

Signal path

• First stage (M1, M2, MT, M3, M4, M5, M6, M7, M8): The PMOS pair M1/M2 on the tail MT folds into the sinks M3/M4 and the cascodes M5/M6; the mirror M7/M8 turns the two halves into one output, o1, which falls as inp rises.
• Second stage (M9, M10, M11, M12): M9 turns o1 into a current, the NMOS mirror M10/M11 copies it onto o2 against the source M12: a non-inverting stage, o2 rises with o1. It runs at one Ib, slow on purpose.
• Output stage (M13, M14): M13 on o2 sinks and M14 on o1 sources: a push-pull output, and M14, sixteen copies of M9, is the feedforward path from o1 to the output. Both paths invert, so out follows inp.
• Local impedance attenuation (Ra, Ca): Ra in series with Ca from o2 to ground: open at DC, it holds o2's impedance near Ra above 1/(R_a C_a).
• Cascode Miller capacitor (Cm, M6): Cm injects the output's current into f2, the source of the cascode M6, which carries it to o1 and sets the dominant pole.

Key relations

• DC gain: A_0 ≈ g_m1 R_o1 · g_m9 R_o2 · g_m13 R_o3. R_o1 is set mostly by the mirror M8, R_o2 and R_o3 by the NMOS M11 and M13, whose V_A is only 2-3 V: the reason those two are long.
• Unity-gain frequency: ω_u ≈ g_m1/C_m. About 3.7 MHz with Cm at 1.2 pF.
• Current buffer: g_m6 ≈ 3 g_m1. The pair runs at one Ib against three in each cascode: above g_m6/C_m the cascode passes a conductance, not a capacitive current, and together with the feedforward M14 that loop stays damped only while the cascode is several times faster than the input pair.
• Local impedance attenuation: R_o2 → R_o2 ∥ R_a above 1/(R_a C_a). The loop through Cm keeps about 38° of margin instead of 20°; the amplifier's gain margin rises from 2 dB to 8 dB.

Trade-offs

• Ra: much larger leaves o2 undamped and the gain margin falls towards 2 dB; smaller changes little.
• Ca: larger brings the attenuation down in frequency; its value hardly matters above a few pF.
• Cm: larger lowers ω_u and raises the phase margin.
• The current ratio that keeps the cascode fast costs first-stage gain: about 100 dB at tt, 94 dB hot.
• First-stage matching area: the 2/6/8 µm input/source/sink lengths reduce random common-mode conversion; the Ra-Ca attenuation still damps the added capacitance over corners and mismatch.

Testbenches and limits

• Operating point: The amplifier as a unity-gain buffer at its input common mode: the current it draws and where its output settles.
• Open-loop gain: Gain and phase with the loop closed only at DC, through a 1 TH inductor, so the operating point is the buffer's and every frequency sees the open loop.
• Step response: A 200mV step into the unity-gain buffer. Settling requires an output change of 90–110 % of the input step; static offset is reported separately. The 1 % dynamic settling band is around the final output, not a claim of 1 % DC accuracy.
• Supply rejection: A ripple on V_DD, and how much of it reaches the unity-gain buffer's output.
• Common-mode rejection: Equal AC sources on both inputs, one in the feedback path, measure closed-loop common-mode leakage. Its inverse approximates CMRR only where differential loop gain is large.
• Noise: Noise referred to the input of the unity-gain buffer: its density at 1 kHz and its total from 1 Hz to 1 MHz.

Design variables and defaults

Ports

• inp input
• inn input
• out output
• vdd supply
• vss ground
• ib bias: the reference current, drawn out of this pin

Reference

M. Tan, W.-H. Ki, A Cascode Miller-Compensated Three-Stage Amplifier With Local Impedance Attenuation for Optimized Complex-Pole Control, 2015. IEEE Journal of Solid-State Circuits, 50(2):440-449.

Cascode Miller compensation through the first-stage cascode, and the local impedance attenuation - a series RC on the second stage's output - that controls the complex non-dominant poles, with a feedforward output device. The core amplifier, its bias, the current ratios the cascode return needs and every size are this library's, for SG13G2 at 1.2 V.