Fractional bandgap reference, 0.76 V output

How it works

A fractional bandgap reference with about 0.76 V output from a 1.2 V supply. An amplifier holds two branches at one voltage: R1 across the PNP Q1 draws V_EB1/R1, which falls with temperature, while Q2, N copies of Q1 at the same current, needs V_T ln N less, and R0 turns that difference into a current that rises. A third PMOS copy sums both into R3: the current-mode topology of 'A CMOS bandgap reference circuit with sub-1-V operation'.

The loop sets its own current: the amplifier drives the PMOS gates until va equals vb, fixing each branch at V_EB1/R1 + (V_T ln N)/R0; M5 and MN copy it into the amplifier's tail, and the start-up devices act only while V_REF is low.

Signal path

• Start-up (MS1, MS2, MS3): While V_REF is low, MS3 holds su high and MS1 pulls the PMOS gates down; once V_REF rises, MS2 pulls su low and MS1 turns off.
• PMOS copies (M1, M2, M5): Share the gate g: M1 feeds Q1 and R1 at va, M2 feeds Q2, R0 and R2 at vb, and M5 biases the amplifier.
• Q1 branch (Q1, R1): Q1's emitter-base voltage sets va; R1 across it draws V_EB1/R1, a current that falls with temperature.
• Q2 branch (Q2, R0, R2): R2 draws the same V_EB1/R1; Q2, N copies at Q1's current, needs V_T ln N less, which R0 turns into a rising current.
• Amplifier (MN, MT, MA1, MA2, MA3, MA4, CC): Compares vb, on its non-inverting input, with va and drives the PMOS gates until the two are equal; C_c on g sets the dominant pole.
• Output (M3, R3): M3 copies the branch current into R3, turning it into V_REF = R3·I.

Key relations

• Emitter-base difference: ΔV_EB = V_EB1 − V_EB2 ≈ V_T ln N. Q1 and Q2 carry equal currents once va = vb; N = 8 by default
• Branch current: I = V_EB1/R1 + (V_T ln N)/R0. a falling part plus a rising part; R1 = 220 kΩ and R0 = 27 kΩ by default
• Reference voltage: V_REF = R3 · I = (R3/R1) (V_EB1 + (R1/R0) V_T ln N). ratios set first-order weighting and scale; absolute resistance also changes current and V_EB1, so retuning may be needed
• Zero slope: dV_EB1/dT + (R1/R0) (k/q) ln N = 0. the condition that sets R1/R0; V_EB's own curvature leaves a residual bow

Trade-offs

• R1 = R2 and R0: their ratio balances the two currents' slopes; with R1 too small V_REF falls with temperature, too large and it rises.
• R3: sets the level, V_REF = R3·I; away from V_REF ≈ V_EB1, M3's drain leaves M1's, worsening line regulation and temperature coefficient.
• N (Q2 = N copies of Q1): a larger ΔV_EB = V_T ln N makes the amplifier's offset matter less, but costs area.
• C_c: sets the dominant pole on the PMOS gates; less capacitance costs phase margin, worst at the cold end of the range.

Testbenches and limits

• Against temperature
• Trimming R1
• Against the supply
• Power-up

Design variables and defaults

Ports

• vref output: the reference voltage; R3 to ground sets its level
• vdd supply
• 0 ground

Reference

H. Banba, H. Shiga, A. Umezawa, T. Miyaba, T. Tanzawa, S. Atsumi and K. Sakui, A CMOS bandgap reference circuit with sub-1-V operation, IEEE Journal of Solid-State Circuits, vol. 34, no. 5, pp. 670-674, 1999. the current-mode bandgap: resistors across the two diodes, their currents summed in a PMOS copy.

The topology and its result, V_REF = (R3/R1)(V_EB1 + (R1/R0) V_T ln N), which no longer has to be 1.2 V.

• B. Razavi, Design of Analog CMOS Integrated Circuits, 2nd ed., 2017