Telescopic-cascode OTA

How it works

A single-stage fully differential OTA in which each side is one branch of five stacked devices: the shared PMOS tail, an input device, a PMOS cascode, an NMOS cascode and a sink. All the gain is made at one high-impedance node per side, where both cascoded resistances meet, for very little current, and the load capacitance compensates it. A differential-difference amplifier holds the output common mode: its devices sense the outputs at their gates, so it puts no resistor on them.

The bench draws Ib out of the PMOS diode MB; MT and MTC are copies. MB1 pushes Ib through RP1, RP2 to ground, which sets the PMOS cascode gate vcp, and MB2 pushes Ib through RN1, RN2 into the NMOS diode MB3, which puts vcn a fixed drop above an NMOS gate voltage. Five devices share 1.2 V: the outputs get the NMOS cascode and sink, the pair and the PMOS cascode share the pair's V_SG plus the 30 mV by which the inputs, at 0.48 V, sit above the outputs, at 0.45 V, and the tail keeps the rest.

Signal path

• Input pair (MT, M1, M2): MT's 4 Ib splits between the PMOS pair, whose n-wells sit on their sources; a rise on inp takes current from M1's branch.
• Cascodes and outputs (M3, M4, M5, M6, M7, M8): The PMOS cascodes M3, M4 carry the pair's currents down to outn and outp, where the cascoded sinks M5 over M7 and M6 over M8 meet them: each output sees both cascoded resistances.
• Common-mode sensing (MTC, M9, M10, M11, M12): M9 and M11, gates on the outputs, and M10 and M12, gates on vocm, share MTC's 2 Ib; a purely differential output leaves the sensing side's total unchanged, a common-mode rise above vocm moves current to the reference side.
• Common-mode loop (M13, M14, M7, M8): The diode M14 turns the reference side's current into cmo, which the sinks M7, M8 copy twice each; M13 is the sensing side's matching diode. As the outputs rise, the sinks pull harder and bring them down.

Key relations

• Differential gain: A_d ≈ g_m1·[(g_m3·r_o3·r_o1) ∥ (g_m5·r_o5·r_o7)]. Both cascoded resistances meet at each output; with one stage this is the whole gain, and the NMOS side sets it.
• Unity-gain frequency: ω_u ≈ g_m1/C_L. Single stage: the load capacitance is the compensation, so a heavier load adds margin.
• Common-mode sensing: ΔI_M14 ≈ g_m10·(V_oc − V_ocm). Equal devices on one tail; a differential output changes nothing to first order.
• Output common mode: V_oc = V_ocm when (W/L)_M7/(W/L)_M14 = I_MT/I_MTC. Each sink must return half the main tail's current while M14 carries half the common-mode tail's.
• Headroom: V_ocm ≥ V_DS5 + V_DS7; V_SG1 + V_icm − V_ocm ≥ V_SD1 + V_SD3. The two budgets the common modes divide; the tail takes what the input common mode and V_SG1 leave of V_DD.

Trade-offs

• Common modes: a higher input common mode gives the pair and its cascode room and takes it from the tail; a higher output common mode gives the NMOS side room and takes it from both.
• NMOS unit size: longer raises the gain and holds the sinks' copy of M14 closer, but loads M14's node, the common-mode loop's second pole.
• Input pair width: narrower raises V_SG1, the budget the pair and its cascode share, at some cost in g_m1 and noise.
• Common-mode sensing devices: wider lowers their V_SG, which keeps MTC saturated at 1.08 V, and adds capacitance to the outputs.

Testbenches and limits

• Operating point: The amplifier as a unity-gain differential buffer, its inputs at their common mode: the current it draws, where its output common mode lands against the reference on vocm, and the differential offset.
• Open-loop gain: Differential gain and phase with the loop closed only at DC, through 1 TH inductors, so the operating point is the buffer's and every frequency sees the open loop.
• Common-mode loop gain: Each common-mode loop opened at the break point the circuit brings out, by Middlebrook's double injection - a voltage in series, then a current into the controlled side - with the differential loop closed as in the buffer: the loop's gain, its crossover, and its phase margin.
• Common-mode step: A 50mV step on the output common-mode reference, vocm, with the amplifier a unity-gain differential buffer: the output common mode follows it, and rings if its loop is short of margin.
• Step response: A 100mV differential step into the unity-gain differential buffer: how fast the differential output follows, whether it rings, and how far the output common mode is pushed on the way.
• Supply rejection: A ripple on V_DD, and how much of it reaches the unity-gain buffer's differential output and its output common mode.
• Common-mode rejection: The same signal on both inputs, on the unity-gain buffer's input common mode: what reaches the differential output is the common-mode to differential gain over the differential one, and what reaches the output common mode is how firmly the common-mode loop holds it.
• Noise: Differential noise referred to the input of the unity-gain buffer: its density at 1 kHz and its total from 1 Hz to 1 MHz.

Design variables and defaults

Ports

• inp input
• inn input
• outp output
• outn output
• vdd supply
• vss ground
• vocm bias: the output common mode asked for, on the gates of M10, M12
• ib bias: the reference current, drawn out of this pin
• cmo bias: the differential-difference amplifier's output, the diode M14: the testbench joins it to cmg, and breaks the loop there
• cmg bias: the gates of the sinks M7, M8

Reference

Q. Fan, F. Sebastiano, J. H. Huijsing, K. A. A. Makinwa, A 1.8 uW 60 nV/sqrt(Hz) Capacitively-Coupled Chopper Instrumentation Amplifier in 65 nm CMOS for Wireless Sensor Nodes, 2011. IEEE Journal of Solid-State Circuits, 46(7):1534-1543.

The topology: the telescopic-cascode OTA of the paper's ripple-reduction loop integrator, with a PMOS input pair, and its common-mode feedback by a differential-difference pair whose reference-side current, through a diode, sets the NMOS sinks. The bias with its resistor-set cascode gates, the choice of common modes that fits five devices in 1.2 V at the corners, the sizing and the targets are this library's, for SG13G2.