CORE-V CV32E40P

How it works

CV32E40P separates instruction fetch, decode, execution and writeback into four pipeline stages. Different instructions can occupy different stages at once, while dependencies and memory responses still impose stalls.

• Instruction fetch obtains and aligns instructions from the instruction interface.
• Decode interprets the instruction and reads the register operands. Control logic handles dependencies and exceptional conditions.
• The execute stage performs arithmetic and memory-address generation. ALU, multiply and divide results write directly from EX to the register file; load results write from WB. Not every instruction uses WB for its result.
• The system supplies instruction/data-memory handshakes, reset, boot and trap addresses, interrupts and debug inputs. It must not assume that memory responds in one cycle.

Design decisions and limits

• Four stages describe pipeline organization, not a guarantee of one completed instruction per clock. Dependencies, branches, division and memory latency matter.
• Floating point and CORE-V/PULP extensions change the supported software and hardware configuration. Keep the first teaching target small and record enabled features.
• The upstream example testbench is for experimentation; full verification lives in core-v-verif. A successful example program does not replace that verification.
• CV32E40P, CV32E40X and CV32E40S should have separate records and evidence if added. This entry is P only.

Try it

Follow two dependent arithmetic instructions through the four stages, then insert a load before them. Explain which result can be forwarded and when memory latency requires a stall.

What runs in the browser

Pinned upstream source links and an AiSIC teaching explanation only. No RTL bundle, simulation result, synthesized netlist, IHP area/delay or fabrication claim is provided.

Upstream sources

cv32e40p_v1.8.3 · Repository LICENSE: Solderpad Hardware License 0.51. Some RTL files, including cv32e40p_top.sv, specify Apache-2.0 WITH SHL-2.1. Check each file and dependency before redistribution; do not apply one blanket license.

Pinned upstream tree