Buffered-reference LDO, 2.5 V from 3.3 V

How it works

A 2.5 V supply from the 3.3 V I/O supply, whose reference is buffered, scaled and filtered before the loop sees it. A two-stage buffer doubles the 1.25 V reference with two equal resistors, an RC low-pass attenuates the buffer's noise above a few hundred hertz, and the main loop - with unity feedback - makes the output copy the filtered level. Its error amplifier is itself a two-stage amplifier compensated as an integrator with a zero, so the loop has a very large DC gain, and the 1 µF output capacitor sets its other pole.

Ib, 5 µA from outside, into MB; the buffer's tail and sink are 2 and 4 copies of it, the error amplifier's 4 and 8. The amplifier currents are referenced to Ib, reducing but not eliminating supply dependence. The reference is an input, 1.25 V; the input is 3.3 V (2.97 to 3.63 V).

Signal path

• Reference buffer (MA1, MA2, MA3, MA4, MA5, RA1, RA2, RzA, CcA): A two-stage op amp with a gain of two set by RA1 and RA2, Miller-compensated by RzA and CcA: vbuf = 2 · V_ref from a low impedance.
• Reference filter (Rf, Cf): Low-pass filters vbuf into vflt, corner 1/(2π · Rf · Cf) = 320 Hz: the buffer's and reference's noise above it is attenuated, not eliminated.
• Error amplifier (ME1, ME2, ME3, ME4, ME5, MTE, MSE): ME1 takes vflt, ME2 the output; the mirror ME3, ME4 feeds xe, which falls as the output rises; the common-source ME5 inverts it onto gate.
• Integrator and zero (RzE, CcE): Across ME5, CcE makes the amplifier an integrator and RzE adds a zero at 1/(2π · RzE · CcE): below it the loop gain is enormous, above it the loop is proportional and the output capacitor sets the crossover.
• Pass device and output (MP, Co, Rb): A 3.3 V PMOS from the input; Co is the regulator's own capacitor on the output, Rb the bleed.

Key relations

• Output voltage: V_out = V_ref · (1 + RA1/RA2) = 2 · V_ref. The gain is in the buffer; the main loop has unity feedback.
• Loop crossover: f_c ≈ g_m,ME2 · RzE · g_m,MP/(2π · C_L). Above the zero the amplifier is proportional, gain g_m,ME2 · RzE; g_m,MP falls at light load, and so does f_c.
• Margin: PM ≈ atan(f_c/f_z), f_z = 1/(2π · RzE · CcE). The integrator and the output pole take 180° below the zero; the zero must sit well below the lowest crossover, at no load.
• Filter noise: v_n ≈ sqrt(k · T/Cf). Whatever Rf is, the filter leaves kT/C of its own: 6 µV rms for 100 pF.

Trade-offs

• Rf, Cf: a lower corner attenuates more of the buffer's noise but settles the output more slowly at start-up; Cf sets the filter's own kT/C floor.
• RzE, CcE: a lower zero adds margin at light load but leaves a slower tail after a load step; RzE also sets the proportional gain and the crossover.
• CcA, RzA: the buffer's own compensation - it must settle without ringing, since a ringing buffer would be filtered into noise and pass unnoticed.
• Rb: the bleed sets g_m,MP at no load, the lowest crossover and so the margin there.

Testbenches and limits

• Operating point: The regulator at its nominal input and its lightest load: the output it holds and the current it draws to hold it.
• Load regulation: The load is swept from lightest to full at nominal input. Regulation is the magnitude of the endpoint output change per ampere; a large output rise fails just as a large fall does.
• Line regulation: The input swept across its rated range, at the lightest and at the full load: how much of the input's change reaches the output.
• Dropout: The input lowered at full load until the output has fallen 2 % below the level it holds at the nominal input: the input-to-output voltage left there is the dropout.
• Loop gain: The loop gain at loads across the whole range, from the lightest to the full load: the loop is cut at the sense line and measured by Middlebrook's double injection - a voltage in series there, then a current into out - which gives it exactly, with every loading in place. The phase and gain margins are the worst over the loads.
• Ringing across the loads: The loads the loop bench visits, in a staircase from the lightest to the full load; at each, once the output has settled, a small step - a tenth more load. How far the output overshoots its new level on the way back, and what is left moving at the end of each step, show whether the regulator is damped at that load: a loop inside it that the sense line does not pass through, and so the loop gain cannot see, shows here.
• Supply rejection: A ripple on the input, at the lightest and at the full load: how much of it reaches the output.
• Load step: The load stepped from the lightest to the full load and back, each edge 1.00 µs: how far the output dips and peaks, and how long it takes to settle within 1 % after each edge. A loop that rings or oscillates at either load shows here, whatever the loop gain says.
• Line step: The input stepped across its rated range, 2.97 V to 3.63 V, and back, each edge 1.00 µs, at full load: how far the output moves.
• Output noise: The noise at the output at full load: its density at 1 kHz and its total from 10 Hz to 100 kHz. The reference is an ideal, noiseless source, so this is the regulator's own noise.
• Reference buffer: A 50 mV step on the reference, and the buffer's own output, vbuf, inside the regulator: it should double the step and settle without ringing. Its loop is inside the regulator, and none of the other benches cuts it.

Design variables and defaults

Ports

• ref input: the reference voltage, which the buffer doubles
• sense input: the output as the regulator reads it
• out output
• vdd supply: the unregulated 3.3 V input
• vss ground
• ib bias: the bias current, driven into this pin

Reference

G. A. Rincon-Mora, Analog IC Design with Low-Dropout Regulators, 2nd, McGraw-Hill, 2014. the LDO's reference and error amplifier: buffering and filtering the reference, the error amplifier's gain stages and their compensation.

The topology: a reference buffer with gain, an RC filter after it, a two-stage error amplifier with a Miller network across its second stage, unity feedback, a PMOS pass device, an on-chip capacitor and a bleed on the output. The bias - every current a copy of one - the sizing and the specs are this library's, on SG13G2's 3.3 V devices.