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RC low-pass
A resistor and capacitor pass slow changes and reduce fast ones. Their product sets the ideal cutoff frequency. The physical models show how parasitics and manufacturing variation move that cutoff; the tight implementation target applies only at the stated nominal condition.
How it works
The capacitor's impedance falls as frequency rises, so the resistor and capacitor form a frequency-dependent voltage divider. The ideal response has one pole, approaches a 20 dB-per-decade roll-off and tends toward −90° phase. Physical passive models add variation and parasitics to that ideal response.
No transistor bias is needed. The bench linearizes the physical passive models about the source's 0 V DC level; their parasitics and voltage/temperature coefficients are part of the small-signal response. The bench drives a 1 V AC source and sweeps three decades either side of the corner.
Signal path
- Series resistor (R1): High-resistance poly, 100 kΩ by default, lets a current (v_in − v_out)/R into the output node, limiting how fast C1 can follow the input.
- Shunt capacitor (C1): MIM capacitance, 1.5915 pF by default as two squares in parallel, integrates that current; its impedance 1/(ωC) falls with frequency, so fast signals are shorted to ground.
Key relations
- Transfer:
H(jω) = 1/(1 + jω·R·C). a divider of R and the capacitor's impedance 1/(jωC) - Corner:
f_c = 1/(2π·R·C). where |H| = 1/√2 (−3 dB) and the phase is −45°: 1 MHz at the defaults - Roll-off:
|H| ≈ f_c/f for f ≫ f_c. 20 dB per decade, the phase approaching −90° - Time constant:
τ = R·C. 159 ns at the defaults; an ideal step response reaches 63 % of its final change after one time constant - Output noise:
v_n^2 = kT/C. R's thermal noise integrated over the pole: independent of R
Trade-offs
- R: raising it lowers the corner without more capacitor area, but adds poly length and noise density 4kTR; the integrated noise stays kT/C.
- C: raising it lowers both the corner and the integrated noise kT/C, but the MIM area grows in proportion.
- R and C: scaling R up and C down together keeps the corner but raises the output impedance and the integrated noise kT/C.
- Process portability: retain the RC relation and loading/noise intent, then choose practical resistor geometry and capacitor area from the new process. Recheck sheet-resistance spread, capacitance density, voltage and temperature coefficients, parasitics and matching; copying these dimensions does not preserve the corner.
- Absolute accuracy: increasing device area can reduce mismatch but does not cancel systematic process spread. A precision absolute pole needs trimming, calibration or compensation, which would be a separate design with its own area and power costs.
Testbenches and limits
- Frequency response: <2% is a nominal TT, 27 °C implementation target. PVT and Monte Carlo show physical pole variation, not yield against this nominal target.
| Bench | Figure | Limit |
|---|---|---|
| Frequency response | Absolute deviation from nominal | ≥ 0 %, ≤ 2 % |
Design variables and defaults
| Variable | Default |
|---|---|
| R | 100 kΩ |
| C | 1.592 pF |
Ports
ininputoutoutput0ground
Reference
A. S. Sedra and K. C. Smith, Microelectronic Circuits, 7th ed., Oxford University Press, 2015. single-time-constant networks - the low-pass STC response.
The closed-form corner f = 1/(2*pi*R*C), which is what the measured corner is compared against.
IHP SG13G2 130 nm. Simulations run in your browser; open the workbench to run this design's benches and change its variables.